Searched refs:GPLL0 (Results 1 – 25 of 56) sorted by relevance
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| /linux/Documentation/devicetree/bindings/interconnect/ |
| A D | qcom,osm-l3.yaml | 54 #define GPLL0 165
61 clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
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| /linux/Documentation/devicetree/bindings/clock/ |
| A D | qcom,gpucc-sdm660.yaml | 27 - description: GPLL0 main gpu branch
28 - description: GPLL0 divider gpu branch
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| A D | qcom,gpucc.yaml | 36 - description: GPLL0 main branch source
37 - description: GPLL0 div branch source
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| A D | qcom,sdm845-dispcc.yaml | 28 - description: GPLL0 source from GCC
29 - description: GPLL0 div source from GCC
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| A D | qcom,msm8998-gpucc.yaml | 25 - description: GPLL0 main branch source (gcc_gpu_gpll0_clk_src)
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| A D | qcom,sc7180-dispcc.yaml | 25 - description: GPLL0 source from GCC
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| A D | qcom,sc7280-dispcc.yaml | 25 - description: GPLL0 source from GCC
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| /linux/Documentation/devicetree/bindings/cpufreq/ |
| A D | cpufreq-qcom-hw.txt | 16 Definition: clock handle for XO clock and GPLL0 clock.
167 clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
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| /linux/include/dt-bindings/clock/ |
| A D | qcom,gcc-mdm9607.h | 9 #define GPLL0 0 macro
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| A D | qcom,gcc-sdx55.h | 10 #define GPLL0 3 macro
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| A D | qcom,gcc-sc7180.h | 11 #define GPLL0 1 macro
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| A D | qcom,gcc-sdm660.h | 111 #define GPLL0 101 macro
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| A D | qcom,gcc-msm8994.h | 11 #define GPLL0 1 macro
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| A D | qcom,gcc-sm6350.h | 11 #define GPLL0 0 macro
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| A D | qcom,gcc-msm8916.h | 9 #define GPLL0 0 macro
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| A D | qcom,gcc-qcm2290.h | 10 #define GPLL0 0 macro
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| A D | qcom,gcc-sm6115.h | 10 #define GPLL0 0 macro
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| A D | qcom,gcc-msm8939.h | 9 #define GPLL0 0 macro
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| A D | qcom,gcc-msm8953.h | 183 #define GPLL0 176 macro
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| A D | qcom,gcc-sdm845.h | 175 #define GPLL0 165 macro
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| A D | qcom,gcc-sm8150.h | 207 #define GPLL0 197 macro
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| A D | qcom,gcc-ipq6018.h | 9 #define GPLL0 0 macro
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| A D | qcom,gcc-sm8250.h | 10 #define GPLL0 0 macro
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| A D | qcom,gcc-msm8974.h | 9 #define GPLL0 0 macro
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| A D | qcom,gcc-msm8998.h | 134 #define GPLL0 125 macro
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