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Searched refs:HCLK_IEP (Results 1 – 21 of 21) sorted by relevance

/linux/include/dt-bindings/clock/
A Drk3128-cru.h138 #define HCLK_IEP 468 macro
A Drk3228-cru.h137 #define HCLK_IEP 468 macro
A Drv1108-cru.h153 #define HCLK_IEP 334 macro
A Drk3328-cru.h200 #define HCLK_IEP 339 macro
A Drk3368-cru.h173 #define HCLK_IEP 468 macro
A Drk3288-cru.h186 #define HCLK_IEP 468 macro
A Drk3399-cru.h317 #define HCLK_IEP 477 macro
A Drk3568-cru.h310 #define HCLK_IEP 247 macro
/linux/Documentation/devicetree/bindings/power/
A Drockchip,power-controller.yaml204 <&cru HCLK_IEP>;
/linux/drivers/clk/rockchip/
A Dclk-rk3128.c476 GATE(HCLK_IEP, "hclk_iep", "hclk_vio", 0, RK2928_CLKGATE_CON(9), 7, GFLAGS),
A Dclk-rk3228.c544 GATE(HCLK_IEP, "hclk_iep", "hclk_vio_pre", 0, RK2928_CLKGATE_CON(13), 3, GFLAGS),
A Dclk-rk3328.c716 GATE(HCLK_IEP, "hclk_iep", "hclk_vio_pre", 0, RK3328_CLKGATE_CON(21), 7, GFLAGS),
A Dclk-rv1108.c450 GATE(HCLK_IEP, "hclk_iep", "hclk_vio_pre", 0,
A Dclk-rk3368.c742 GATE(HCLK_IEP, "hclk_iep", "hclk_vio", 0, RK3368_CLKGATE_CON(16), 3, GFLAGS),
A Dclk-rk3288.c790 GATE(HCLK_IEP, "hclk_iep", "hclk_vio", 0, RK3288_CLKGATE_CON(15), 3, GFLAGS),
A Dclk-rk3399.c786 GATE(HCLK_IEP, "hclk_iep", "hclk_iep_pre", 0,
A Dclk-rk3568.c1105 GATE(HCLK_IEP, "hclk_iep", "hclk_rga_pre", 0,
/linux/arch/arm/boot/dts/
A Drk322x.dtsi205 <&cru HCLK_IEP>,
707 clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
A Drk3288.dtsi778 <&cru HCLK_IEP>,
990 clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
/linux/arch/arm64/boot/dts/rockchip/
A Drk3368.dtsi661 <&cru HCLK_IEP>,
822 clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
A Drk3399.dtsi1034 <&cru HCLK_IEP>;
1345 clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;

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