Home
last modified time | relevance | path

Searched refs:HCLK_VPU (Results 1 – 13 of 13) sorted by relevance

/linux/include/dt-bindings/clock/
A Drv1108-cru.h164 #define HCLK_VPU 345 macro
166 #define CLK_NR_CLKS (HCLK_VPU + 1)
A Drk3228-cru.h133 #define HCLK_VPU 464 macro
A Drk3328-cru.h188 #define HCLK_VPU 326 macro
A Dpx30-cru.h120 #define HCLK_VPU 244 macro
A Drk3568-cru.h302 #define HCLK_VPU 239 macro
/linux/arch/arm/boot/dts/
A Drk322x.dtsi228 <&cru HCLK_VPU>;
619 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
629 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
/linux/arch/arm64/boot/dts/rockchip/
A Drk3328.dtsi313 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
636 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
647 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
657 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
A Dpx30.dtsi288 <&cru HCLK_VPU>,
1058 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
1068 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
/linux/drivers/clk/rockchip/
A Dclk-rk3228.c632 GATE(HCLK_VPU, "hclk_vpu", "hclk_vpu_pre", 0, RK2928_CLKGATE_CON(15), 1, GFLAGS),
A Dclk-rk3328.c529 GATE(HCLK_VPU, "hclk_vpu", "hclk_vpu_pre", CLK_SET_RATE_PARENT,
A Dclk-rv1108.c258 GATE(HCLK_VPU, "hclk_vpu", "hclk_rkvdec_pre", 0,
A Dclk-px30.c873 GATE(HCLK_VPU, "hclk_vpu", "hclk_vpu_pre", 0, PX30_CLKGATE_CON(4), 6, GFLAGS),
A Dclk-rk3568.c1083 GATE(HCLK_VPU, "hclk_vpu", "hclk_vpu_pre", 0,

Completed in 56 milliseconds