Searched refs:HDP_HWIP (Results 1 – 8 of 8) sorted by relevance
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | hdp_v4_0.c | 52 if (adev->ip_versions[HDP_HWIP][0] == IP_VERSION(4, 4, 0)) in hdp_v4_0_invalidate_hdp()
82 if (adev->ip_versions[HDP_HWIP][0] >= IP_VERSION(4, 4, 0)) in hdp_v4_0_reset_ras_error_count()
94 if (adev->ip_versions[HDP_HWIP][0] == IP_VERSION(4, 0, 0) || in hdp_v4_0_update_clock_gating()
95 adev->ip_versions[HDP_HWIP][0] == IP_VERSION(4, 0, 1) || in hdp_v4_0_update_clock_gating()
96 adev->ip_versions[HDP_HWIP][0] == IP_VERSION(4, 1, 1) || in hdp_v4_0_update_clock_gating()
97 adev->ip_versions[HDP_HWIP][0] == IP_VERSION(4, 1, 0)) { in hdp_v4_0_update_clock_gating()
139 switch (adev->ip_versions[HDP_HWIP][0]) { in hdp_v4_0_init_registers()
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| A D | amdgpu_discovery.c | 157 [HDP_HWIP] = HDP_HWID,
1005 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 0, 0); in amdgpu_discovery_set_ip_blocks()
1026 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 0, 1); in amdgpu_discovery_set_ip_blocks()
1049 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 1, 1); in amdgpu_discovery_set_ip_blocks()
1065 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 1, 0); in amdgpu_discovery_set_ip_blocks()
1085 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 2, 0); in amdgpu_discovery_set_ip_blocks()
1108 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 2, 1); in amdgpu_discovery_set_ip_blocks()
1135 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
1249 switch (adev->ip_versions[HDP_HWIP][0]) { in amdgpu_discovery_set_ip_blocks()
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| A D | dimgrey_cavefish_reg_init.c | 36 adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i])); in dimgrey_cavefish_reg_base_init()
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| A D | aldebaran_reg_init.c | 35 adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i])); in aldebaran_reg_base_init()
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| A D | arct_reg_init.c | 35 adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i])); in arct_reg_base_init()
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| A D | vega10_reg_init.c | 35 adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i])); in vega10_reg_base_init()
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| A D | vega20_reg_init.c | 35 adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i])); in vega20_reg_base_init()
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| A D | amdgpu.h | 731 HDP_HWIP, enumerator
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