Searched refs:IMX7ULP_CLK_WDG1 (Results 1 – 4 of 4) sorted by relevance
54 clocks = <&pcc2 IMX7ULP_CLK_WDG1>;55 assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
89 #define IMX7ULP_CLK_WDG1 23 macro
260 clocks = <&pcc2 IMX7ULP_CLK_WDG1>;261 assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
172 …hws[IMX7ULP_CLK_WDG1] = imx7ulp_clk_hw_composite("wdg1", periph_bus_sels, ARRAY_SIZE(periph_bu… in imx7ulp_clk_pcc2_init()
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