Searched refs:INTEL_PMC_IDX_FIXED_VLBR (Results 1 – 5 of 5) sorted by relevance
| /linux/arch/x86/kvm/vmx/ |
| A D | pmu_intel.c | 291 __set_bit(INTEL_PMC_IDX_FIXED_VLBR, pmu->pmc_in_use); in intel_pmu_create_guest_lbr_event()
304 __set_bit(INTEL_PMC_IDX_FIXED_VLBR, pmu->pmc_in_use); in intel_pmu_create_guest_lbr_event()
337 __set_bit(INTEL_PMC_IDX_FIXED_VLBR, vcpu_to_pmu(vcpu)->pmc_in_use); in intel_pmu_handle_lbr_msrs_access()
341 clear_bit(INTEL_PMC_IDX_FIXED_VLBR, vcpu_to_pmu(vcpu)->pmc_in_use); in intel_pmu_handle_lbr_msrs_access()
540 bitmap_set(pmu->all_valid_pmc_idx, INTEL_PMC_IDX_FIXED_VLBR, 1); in intel_pmu_refresh()
680 if (test_bit(INTEL_PMC_IDX_FIXED_VLBR, pmu->pmc_in_use)) in vmx_passthrough_lbr_msrs()
687 __clear_bit(INTEL_PMC_IDX_FIXED_VLBR, pmu->pmc_in_use); in vmx_passthrough_lbr_msrs()
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| /linux/arch/x86/include/asm/ |
| A D | perf_event.h | 333 #define INTEL_PMC_IDX_FIXED_VLBR (GLOBAL_STATUS_LBRS_FROZEN_BIT) macro
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| /linux/arch/x86/events/intel/ |
| A D | lbr.c | 754 return test_bit(INTEL_PMC_IDX_FIXED_VLBR, in vlbr_exclude_host()
1855 __EVENT_CONSTRAINT(INTEL_FIXED_VLBR_EVENT, (1ULL << INTEL_PMC_IDX_FIXED_VLBR),
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| A D | core.c | 2430 case INTEL_PMC_IDX_FIXED_VLBR: in intel_pmu_disable_event()
2752 case INTEL_PMC_IDX_FIXED_VLBR: in intel_pmu_enable_event()
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| /linux/arch/x86/events/ |
| A D | core.c | 1224 case INTEL_PMC_IDX_FIXED_VLBR: in x86_assign_hw_event()
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