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Searched refs:MLXSW_CORE_RES_VALID (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/net/ethernet/mellanox/mlxsw/
A Dspectrum_policer.c88 if (!MLXSW_CORE_RES_VALID(core, MAX_GLOBAL_POLICERS) || in mlxsw_sp_policer_single_rate_family_init()
89 !MLXSW_CORE_RES_VALID(core, MAX_CPU_POLICERS)) in mlxsw_sp_policer_single_rate_family_init()
411 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_GLOBAL_POLICERS) || in mlxsw_sp_policer_resources_register()
412 !MLXSW_CORE_RES_VALID(mlxsw_core, MAX_CPU_POLICERS)) in mlxsw_sp_policer_resources_register()
A Dspectrum_cnt.c255 if (!MLXSW_CORE_RES_VALID(mlxsw_core, COUNTER_POOL_SIZE) || in mlxsw_sp_counter_resources_register()
256 !MLXSW_CORE_RES_VALID(mlxsw_core, COUNTER_BANK_SIZE)) in mlxsw_sp_counter_resources_register()
A Dspectrum_acl_erp.c1497 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_ERPT_ENTRIES_2KB) || in mlxsw_sp_acl_erp_tables_sizes_query()
1498 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_ERPT_ENTRIES_4KB) || in mlxsw_sp_acl_erp_tables_sizes_query()
1499 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_ERPT_ENTRIES_8KB) || in mlxsw_sp_acl_erp_tables_sizes_query()
1500 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_ERPT_ENTRIES_12KB)) in mlxsw_sp_acl_erp_tables_sizes_query()
1524 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_MAX_ERPT_BANK_SIZE) || in mlxsw_sp_acl_erp_tables_init()
1525 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_MAX_ERPT_BANKS)) in mlxsw_sp_acl_erp_tables_init()
A Dspectrum_acl_bloom_filter.c247 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_MAX_BF_LOG)) in mlxsw_sp_acl_bf_init()
A Dspectrum.c2318 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_CPU_POLICERS)) in mlxsw_sp_cpu_policers_set()
2358 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_TRAP_GROUPS)) in mlxsw_sp_trap_groups_set()
2440 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_CPU_POLICERS)) in mlxsw_sp_traps_init()
2512 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG) || in mlxsw_sp_lag_init()
2513 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG_MEMBERS)) in mlxsw_sp_lag_init()
3192 if (!MLXSW_CORE_RES_VALID(mlxsw_core, KVD_SIZE)) in mlxsw_sp1_resources_kvd_register()
3252 if (!MLXSW_CORE_RES_VALID(mlxsw_core, KVD_SIZE)) in mlxsw_sp2_resources_kvd_register()
3272 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_SPAN)) in mlxsw_sp_resources_span_register()
3292 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_RIF_MAC_PROFILES)) in mlxsw_sp_resources_rif_mac_profile_register()
3386 if (!MLXSW_CORE_RES_VALID(mlxsw_core, KVD_SINGLE_MIN_SIZE) || in mlxsw_sp_kvd_sizes_get()
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A Dspectrum1_mr_tcam.c301 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_MAX_TCAM_RULES)) in mlxsw_sp1_mr_tcam_init()
A Dspectrum_nve.c958 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_NVE_MC_ENTRIES_IPV4) || in mlxsw_sp_nve_resources_query()
959 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_NVE_MC_ENTRIES_IPV6)) in mlxsw_sp_nve_resources_query()
A Dpci.c1562 if (MLXSW_CORE_RES_VALID(mlxsw_core, CQE_V2) && in mlxsw_pci_init()
1565 else if (MLXSW_CORE_RES_VALID(mlxsw_core, CQE_V1) && in mlxsw_pci_init()
1568 else if ((MLXSW_CORE_RES_VALID(mlxsw_core, CQE_V0) && in mlxsw_pci_init()
1570 !MLXSW_CORE_RES_VALID(mlxsw_core, CQE_V0)) { in mlxsw_pci_init()
A Dspectrum_buffers.c1228 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, CELL_SIZE)) in mlxsw_sp_buffers_init()
1231 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, GUARANTEED_SHARED_BUFFER)) in mlxsw_sp_buffers_init()
1234 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_HEADROOM_SIZE)) in mlxsw_sp_buffers_init()
A Dcore.h419 #define MLXSW_CORE_RES_VALID(mlxsw_core, short_res_id) \ macro
A Dspectrum_mr_tcam.c575 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MC_ERIF_LIST_ENTRIES)) in mlxsw_sp_mr_tcam_init()
A Dspectrum_acl_atcam.c125 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_MAX_LARGE_KEY_ID)) in mlxsw_sp_acl_atcam_region_12kb_init()
A Dcore.c130 if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_SYSTEM_PORT)) in mlxsw_ports_init()
1960 if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG) && in __mlxsw_core_bus_device_register()
1961 MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG_MEMBERS)) { in __mlxsw_core_bus_device_register()
A Dspectrum_acl_tcam.c104 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, KVD_SIZE)) in mlxsw_sp_acl_tcam_priority_get()
A Dspectrum_span.c86 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_SPAN)) in mlxsw_sp_span_init()
A Dspectrum_router.c715 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LPM_TREES)) in mlxsw_sp_lpm_init()
1034 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_VRS)) in mlxsw_sp_vrs_init()
9769 if (!MLXSW_CORE_RES_VALID(core, MAX_RIF_MAC_PROFILES)) in mlxsw_sp_rifs_init()
10161 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_RIFS)) in __mlxsw_sp_router_init()

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