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Searched refs:NUM_BANKS (Results 1 – 19 of 19) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
A Dgfx_v6_0.c461 NUM_BANKS(ADDR_SURF_4_BANK); in gfx_v6_0_tiling_mode_table_init()
469 NUM_BANKS(ADDR_SURF_4_BANK); in gfx_v6_0_tiling_mode_table_init()
477 NUM_BANKS(ADDR_SURF_2_BANK); in gfx_v6_0_tiling_mode_table_init()
567 NUM_BANKS(ADDR_SURF_8_BANK); in gfx_v6_0_tiling_mode_table_init()
575 NUM_BANKS(ADDR_SURF_8_BANK); in gfx_v6_0_tiling_mode_table_init()
583 NUM_BANKS(ADDR_SURF_4_BANK); in gfx_v6_0_tiling_mode_table_init()
591 NUM_BANKS(ADDR_SURF_4_BANK); in gfx_v6_0_tiling_mode_table_init()
599 NUM_BANKS(ADDR_SURF_2_BANK); in gfx_v6_0_tiling_mode_table_init()
607 NUM_BANKS(ADDR_SURF_2_BANK); in gfx_v6_0_tiling_mode_table_init()
615 NUM_BANKS(ADDR_SURF_2_BANK); in gfx_v6_0_tiling_mode_table_init()
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A Dgfx_v8_0.c2240 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2244 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2248 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2252 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2256 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2260 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2264 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2432 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2436 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2440 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
[all …]
A Dgfx_v7_0.c1181 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v7_0_tiling_mode_table_init()
1185 NUM_BANKS(ADDR_SURF_4_BANK)); in gfx_v7_0_tiling_mode_table_init()
1209 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v7_0_tiling_mode_table_init()
1213 NUM_BANKS(ADDR_SURF_4_BANK)); in gfx_v7_0_tiling_mode_table_init()
1360 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v7_0_tiling_mode_table_init()
1364 NUM_BANKS(ADDR_SURF_4_BANK)); in gfx_v7_0_tiling_mode_table_init()
1368 NUM_BANKS(ADDR_SURF_4_BANK)); in gfx_v7_0_tiling_mode_table_init()
1384 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v7_0_tiling_mode_table_init()
1392 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v7_0_tiling_mode_table_init()
1396 NUM_BANKS(ADDR_SURF_4_BANK)); in gfx_v7_0_tiling_mode_table_init()
[all …]
A Dcikd.h197 # define NUM_BANKS(x) ((x) << 6) macro
A Dsid.h1218 # define NUM_BANKS(x) ((x) << 20) macro
A Ddce_v6_0.c1943 num_banks = AMDGPU_TILING_GET(tiling_flags, NUM_BANKS); in dce_v6_0_crtc_do_set_base()
A Ddce_v8_0.c1916 num_banks = AMDGPU_TILING_GET(tiling_flags, NUM_BANKS); in dce_v8_0_crtc_do_set_base()
A Ddce_v10_0.c1995 num_banks = AMDGPU_TILING_GET(tiling_flags, NUM_BANKS); in dce_v10_0_crtc_do_set_base()
A Ddce_v11_0.c2037 num_banks = AMDGPU_TILING_GET(tiling_flags, NUM_BANKS); in dce_v11_0_crtc_do_set_base()
A Dgfx_v9_0.c2256 NUM_BANKS); in gfx_v9_0_gpu_early_init()
/linux/drivers/gpu/drm/radeon/
A Dsi.c2519 NUM_BANKS(ADDR_SURF_16_BANK) | in si_tiling_mode_table_init()
2528 NUM_BANKS(ADDR_SURF_16_BANK) | in si_tiling_mode_table_init()
2537 NUM_BANKS(ADDR_SURF_16_BANK) | in si_tiling_mode_table_init()
2546 NUM_BANKS(ADDR_SURF_16_BANK) | in si_tiling_mode_table_init()
2555 NUM_BANKS(ADDR_SURF_16_BANK) | in si_tiling_mode_table_init()
2564 NUM_BANKS(ADDR_SURF_16_BANK) | in si_tiling_mode_table_init()
2573 NUM_BANKS(ADDR_SURF_16_BANK) | in si_tiling_mode_table_init()
2582 NUM_BANKS(ADDR_SURF_16_BANK) | in si_tiling_mode_table_init()
2591 NUM_BANKS(ADDR_SURF_16_BANK) | in si_tiling_mode_table_init()
2717 NUM_BANKS(ADDR_SURF_8_BANK) | in si_tiling_mode_table_init()
[all …]
A Dcik.c2598 NUM_BANKS(ADDR_SURF_8_BANK)); in cik_tiling_mode_table_init()
2602 NUM_BANKS(ADDR_SURF_4_BANK)); in cik_tiling_mode_table_init()
2606 NUM_BANKS(ADDR_SURF_2_BANK)); in cik_tiling_mode_table_init()
2626 NUM_BANKS(ADDR_SURF_8_BANK)); in cik_tiling_mode_table_init()
2630 NUM_BANKS(ADDR_SURF_4_BANK)); in cik_tiling_mode_table_init()
2634 NUM_BANKS(ADDR_SURF_2_BANK)); in cik_tiling_mode_table_init()
2827 NUM_BANKS(ADDR_SURF_8_BANK)); in cik_tiling_mode_table_init()
2831 NUM_BANKS(ADDR_SURF_4_BANK)); in cik_tiling_mode_table_init()
2855 NUM_BANKS(ADDR_SURF_8_BANK)); in cik_tiling_mode_table_init()
2859 NUM_BANKS(ADDR_SURF_4_BANK)); in cik_tiling_mode_table_init()
[all …]
A Dsid.h1221 # define NUM_BANKS(x) ((x) << 20) macro
A Dcikd.h1275 # define NUM_BANKS(x) ((x) << 6) macro
/linux/drivers/pinctrl/nomadik/
A Dpinctrl-nomadik.c284 #define NUM_BANKS ARRAY_SIZE(nmk_gpio_chips) macro
545 for (i = 0; i < NUM_BANKS; i++) { in nmk_gpio_glitch_slpm_init()
563 for (i = 0; i < NUM_BANKS; i++) { in nmk_gpio_glitch_slpm_restore()
1521 static unsigned int slpm[NUM_BANKS]; in nmk_pmx_set()
/linux/drivers/gpu/drm/amd/display/dc/dcn10/
A Ddcn10_hubp.h267 HUBP_SF(HUBP0_DCSURF_ADDR_CONFIG, NUM_BANKS, mask_sh),\
464 type NUM_BANKS;\
A Ddcn10_hubp.c150 NUM_BANKS, log_2(info->gfx9.num_banks), in hubp1_program_tiling()
/linux/drivers/gpu/drm/amd/include/
A Dnavi10_enum.h1549 typedef enum NUM_BANKS { enum
1555 } NUM_BANKS; typedef
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
A Damdgpu_dm.c4711 num_banks = AMDGPU_TILING_GET(tiling_flags, NUM_BANKS); in fill_gfx8_tiling_info_from_flags()

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