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Searched refs:OTG_CONTROL (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dcn20/
A Ddcn20_optc.c65 REG_UPDATE_2(OTG_CONTROL, in optc2_enable_crtc()
315 REG_UPDATE(OTG_CONTROL, OTG_MASTER_EN, 0); in optc2_align_vblanks()
317 REG_WAIT(OTG_CONTROL, in optc2_align_vblanks()
374 REG_UPDATE(OTG_CONTROL, in optc2_align_vblanks()
391 REG_WAIT(OTG_CONTROL, in optc2_align_vblanks()
/linux/drivers/gpu/drm/amd/display/dc/dcn31/
A Ddcn31_optc.c113 REG_UPDATE_2(OTG_CONTROL, in optc31_enable_crtc()
131 REG_UPDATE(OTG_CONTROL, in optc31_disable_crtc()
149 REG_UPDATE_2(OTG_CONTROL, in optc31_immediate_disable_crtc()
A Ddcn31_optc.h50 SRI(OTG_CONTROL, OTG, inst),\
/linux/drivers/gpu/drm/amd/display/dc/dcn10/
A Ddcn10_optc.c281 REG_UPDATE_2(OTG_CONTROL, in optc1_program_timing()
518 REG_UPDATE_2(OTG_CONTROL, in optc1_enable_crtc()
536 REG_UPDATE_2(OTG_CONTROL, in optc1_disable_crtc()
650 regval = REG_READ(OTG_CONTROL); in optc1_lock()
1346 REG_GET(OTG_CONTROL, in optc1_read_otg_state()
1411 REG_GET(OTG_CONTROL, in optc1_get_otg_active_size()
1449 REG_GET(OTG_CONTROL, OTG_MASTER_EN, &otg_enabled); in optc1_is_tg_enabled()
A Ddcn10_optc.h52 SRI(OTG_CONTROL, OTG, inst),\
124 uint32_t OTG_CONTROL; member
/linux/drivers/gpu/drm/amd/display/dc/dcn30/
A Ddcn30_optc.c128 REG_UPDATE(OTG_CONTROL, OTG_OUT_MUX, dest); in optc3_set_out_mux()
A Ddcn30_optc.h51 SRI(OTG_CONTROL, OTG, inst),\

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