Searched refs:PHYCLKD18PerState (Results 1 – 3 of 3) sorted by relevance
870 double PHYCLKD18PerState[DC__VOLTAGE_STATES]; member
283 mode_lib->vba.PHYCLKD18PerState[i] = soc->clock_limits[i].phyclk_d18_mhz; in fetch_socbb_params()
4544 if (v->Outbpp == BPP_INVALID && v->PHYCLKD18PerState[i] >= 10000.0 / 18) {4563 if (v->Outbpp == BPP_INVALID && v->PHYCLKD18PerState[i] >= 12000.0 / 18) {
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