| /linux/drivers/clk/mediatek/ |
| A D | clk-mt8192.c | 1148 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ macro
1158 PLL_B(CLK_APMIXED_MAINPLL, "mainpll", 0x0340, 0x034c, 0xff000000,
1160 PLL_B(CLK_APMIXED_UNIVPLL, "univpll", 0x0308, 0x0314, 0xff000000,
1164 PLL_B(CLK_APMIXED_MSDCPLL, "msdcpll", 0x0350, 0x035c, 0x00000000,
1166 PLL_B(CLK_APMIXED_MMPLL, "mmpll", 0x0360, 0x036c, 0xff000000,
1168 PLL_B(CLK_APMIXED_ADSPPLL, "adsppll", 0x0370, 0x037c, 0xff000000,
1170 PLL_B(CLK_APMIXED_MFGPLL, "mfgpll", 0x0268, 0x0274, 0x00000000,
1172 PLL_B(CLK_APMIXED_TVDPLL, "tvdpll", 0x0380, 0x038c, 0x00000000,
1174 PLL_B(CLK_APMIXED_APLL1, "apll1", 0x0318, 0x0328, 0x00000000,
1176 PLL_B(CLK_APMIXED_APLL2, "apll2", 0x032c, 0x033c, 0x00000000,
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| A D | clk-mt2712.c | 1166 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ macro
1192 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
1247 PLL_B(CLK_APMIXED_MMPLL, "mmpll", 0x0250, 0x0260, 0x00000101,
1250 PLL_B(CLK_APMIXED_ARMCA35PLL, "armca35pll", 0x0100, 0x0110, 0xf0000101,
1253 PLL_B(CLK_APMIXED_ARMCA72PLL, "armca72pll", 0x0210, 0x0220, 0x00000101,
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| A D | clk-mt8183.c | 1067 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ macro
1099 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
1124 PLL_B(CLK_APMIXED_ARMPLL_LL, "armpll_ll", 0x0200, 0x020C, 0x00000001,
1127 PLL_B(CLK_APMIXED_ARMPLL_L, "armpll_l", 0x0210, 0x021C, 0x00000001,
1139 PLL_B(CLK_APMIXED_MFGPLL, "mfgpll", 0x0240, 0x024C, 0x00000001,
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| A D | clk-mt8516.c | 736 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ macro
759 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
779 PLL_B(CLK_APMIXED_MMPLL, "mmpll", 0x0160, 0x0170, 0x00000001, 0,
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| A D | clk-mt8167.c | 982 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ macro
1005 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
1025 PLL_B(CLK_APMIXED_MMPLL, "mmpll", 0x0160, 0x0170, 0x00000001, 0,
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| A D | clk-mt8173.c | 938 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ macro
961 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
979 …PLL_B(CLK_APMIXED_MMPLL, "mmpll", 0x240, 0x24c, 0x00000001, 0, 21, 0x244, 24, 0x0, 0x244, 0, mmpll…
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| A D | clk-mt7629.c | 24 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ macro
48 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
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| A D | clk-mt6797.c | 609 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ macro
632 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
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| A D | clk-mt6779.c | 1145 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ macro
1177 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
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| A D | clk-mt6765.c | 716 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ macro
744 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
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