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Searched refs:PLL_GPLL (Results 1 – 25 of 33) sorted by relevance

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/linux/include/dt-bindings/clock/
A Drk3036-cru.h13 #define PLL_GPLL 3 macro
A Drk3188-cru-common.h14 #define PLL_GPLL 4 macro
A Drk3128-cru.h14 #define PLL_GPLL 4 macro
A Drk3228-cru.h14 #define PLL_GPLL 4 macro
A Drv1108-cru.h13 #define PLL_GPLL 2 macro
A Drk3328-cru.h14 #define PLL_GPLL 4 macro
A Drk3368-cru.h14 #define PLL_GPLL 5 macro
A Dpx30-cru.h182 #define PLL_GPLL 1 macro
A Drk3288-cru.h14 #define PLL_GPLL 4 macro
A Drk3399-cru.h15 #define PLL_GPLL 5 macro
A Drk3568-cru.h73 #define PLL_GPLL 4 macro
/linux/drivers/clk/rockchip/
A Dclk-rk3188.c222 [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(12),
233 [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(12),
A Dclk-rk3036.c141 [gpll] = PLL(pll_rk3036, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(12),
A Dclk-rk3128.c165 [gpll] = PLL(pll_rk3036, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(12),
A Dclk-rk3228.c175 [gpll] = PLL(pll_rk3036, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(9),
A Dclk-rk3328.c224 [gpll] = PLL(pll_rk3328, PLL_GPLL, "gpll", mux_pll_p,
A Dclk-rv1108.c158 [gpll] = PLL(pll_rk3399, PLL_GPLL, "gpll", mux_pll_p, 0, RV1108_PLL_CON(16),
A Dclk-rk3368.c138 [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK3368_PLL_CON(16),
A Dclk-rk3288.c232 [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK3288_PLL_CON(12),
A Dclk-px30.c200 [gpll] = PLL(pll_rk3328, PLL_GPLL, "gpll", mux_pll_p, 0, PX30_PMU_PLL_CON(0),
/linux/arch/arm/boot/dts/
A Drk3188-bqedison2qc.dts226 assigned-clocks = <&cru PLL_GPLL>, <&cru PLL_CPLL>,
A Drk3066a.dtsi209 assigned-clocks = <&cru PLL_CPLL>, <&cru PLL_GPLL>,
/linux/arch/arm64/boot/dts/rockchip/
A Drk3399-gru-scarlet.dtsi369 <&cru PLL_GPLL>, <&cru PLL_CPLL>,
A Drk3328.dtsi782 <&cru PLL_GPLL>, <&cru PLL_CPLL>,
789 <&cru PLL_GPLL>, <&xin24m>,
A Drk3399-gru.dtsi353 <&cru PLL_GPLL>, <&cru PLL_CPLL>,

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