Searched refs:PLL_NPLL (Results 1 – 18 of 18) sorted by relevance
| /linux/include/dt-bindings/clock/ |
| A D | rk3328-cru.h | 15 #define PLL_NPLL 5 macro
|
| A D | rk3368-cru.h | 15 #define PLL_NPLL 6 macro
|
| A D | px30-cru.h | 10 #define PLL_NPLL 4 macro
|
| A D | rk3288-cru.h | 15 #define PLL_NPLL 5 macro
|
| A D | rk3399-cru.h | 16 #define PLL_NPLL 6 macro
|
| A D | rk3568-cru.h | 75 #define PLL_NPLL 6 macro
|
| /linux/arch/arm64/boot/dts/rockchip/ |
| A D | rk3326-odroid-go2.dts | 232 assigned-clocks = <&cru PLL_NPLL>,
|
| A D | rk3399-gru-scarlet.dtsi | 370 <&cru PLL_NPLL>,
|
| A D | rk3399-gru.dtsi | 354 <&cru PLL_NPLL>,
|
| A D | px30.dtsi | 790 assigned-clocks = <&cru PLL_NPLL>,
|
| A D | rk3399.dtsi | 1434 <&cru PLL_NPLL>,
|
| /linux/drivers/clk/rockchip/ |
| A D | clk-rk3328.c | 227 [npll] = PLL(pll_rk3328, PLL_NPLL, "npll", mux_pll_p,
|
| A D | clk-rk3368.c | 140 [npll] = PLL(pll_rk3066, PLL_NPLL, "npll", mux_pll_p, 0, RK3368_PLL_CON(20),
|
| A D | clk-rk3288.c | 234 [npll] = PLL(pll_rk3066, PLL_NPLL, "npll", mux_pll_p, 0, RK3288_PLL_CON(16),
|
| A D | clk-px30.c | 194 [npll] = PLL(pll_rk3328, PLL_NPLL, "npll", mux_pll_p,
|
| A D | clk-rk3399.c | 229 [npll] = PLL(pll_rk3399, PLL_NPLL, "npll", mux_pll_p, 0, RK3399_PLL_CON(40),
|
| A D | clk-rk3568.c | 327 [npll] = PLL(pll_rk3328, PLL_NPLL, "npll", mux_pll_p,
|
| /linux/arch/arm/boot/dts/ |
| A D | rk3288.dtsi | 869 <&cru PLL_NPLL>, <&cru ACLK_CPU>,
|
Completed in 54 milliseconds