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Searched refs:PLL_REF_DIV (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/clk/x86/
A Dclk-cgu-pll.c17 #define PLL_REF_DIV(x) ((x) + 0x08) macro
46 mult = lgm_get_clk_val(pll->membase, PLL_REF_DIV(pll->reg), 0, 12); in lgm_pll_recalc_rate()
47 div = lgm_get_clk_val(pll->membase, PLL_REF_DIV(pll->reg), 18, 6); in lgm_pll_recalc_rate()
/linux/drivers/gpu/drm/amd/display/dc/dce/
A Ddce_clock_source.h52 CS_SF(PLL_REF_DIV, PLL_REF_DIV, mask_sh)
201 type PLL_REF_DIV; \
A Ddce_clock_source.c1484 calc_pll_cs_init_data.max_pll_ref_divider = clk_src->cs_mask->PLL_REF_DIV; in dce110_clk_src_construct()
1503 calc_pll_cs_init_data_hdmi.max_pll_ref_divider = clk_src->cs_mask->PLL_REF_DIV; in dce110_clk_src_construct()
/linux/drivers/video/fbdev/aty/
A Dmach64_ct.c391 pll->ct.pll_ref_div = aty_ld_pll_ct(PLL_REF_DIV, par); in aty_get_pll_ct()
517 pll->ct.pll_ref_div = aty_ld_pll_ct(PLL_REF_DIV, par); in aty_init_pll_ct()
630 aty_st_pll_ct(PLL_REF_DIV, pll->ct.pll_ref_div, par); in aty_resume_pll_ct()
A Datyfb_base.c2476 u8 pll_ref_div = aty_ld_pll_ct(PLL_REF_DIV, par); in aty_init()
3102 M = pll_regs[PLL_REF_DIV]; in atyfb_setup_sparc()
/linux/include/video/
A Dmach64.h782 #define PLL_REF_DIV 0x02 macro

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