Home
last modified time | relevance | path

Searched refs:PRIV_REG_INT_ENABLE (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/radeon/
A Dcikd.h1335 # define PRIV_REG_INT_ENABLE (1 << 23) macro
1368 # define PRIV_REG_INT_ENABLE (1 << 23) macro
A Dcik.c7039 cp_int_cntl |= PRIV_INSTR_INT_ENABLE | PRIV_REG_INT_ENABLE; in cik_irq_set()
/linux/drivers/gpu/drm/amd/amdgpu/
A Dgfx_v9_0.c5824 PRIV_REG_INT_ENABLE, in gfx_v9_0_set_priv_reg_fault_state()
A Dgfx_v8_0.c6514 WREG32_FIELD(CP_INT_CNTL_RING0, PRIV_REG_INT_ENABLE, in gfx_v8_0_set_priv_reg_fault_state()
A Dgfx_v10_0.c9180 PRIV_REG_INT_ENABLE, in gfx_v10_0_set_priv_reg_fault_state()

Completed in 69 milliseconds