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Searched refs:R9A07G044_SSI1_RST_M2_REG (Results 1 – 3 of 3) sorted by relevance

/linux/include/dt-bindings/clock/
A Dr9a07g044-cpg.h186 #define R9A07G044_SSI1_RST_M2_REG 51 macro
/linux/drivers/clk/renesas/
A Dr9a07g044-cpg.c240 DEF_RST(R9A07G044_SSI1_RST_M2_REG, 0x870, 1),
/linux/arch/arm64/boot/dts/renesas/
A Dr9a07g044.dtsi129 resets = <&cpg R9A07G044_SSI1_RST_M2_REG>;

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