| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | gfxhub_v2_0.c | 217 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v2_0_init_cache_regs()
220 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v2_0_init_cache_regs()
235 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v2_0_init_cache_regs()
239 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v2_0_init_cache_regs()
261 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL, in gfxhub_v2_0_enable_system_domain()
294 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_0_setup_vmid_config()
296 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_0_setup_vmid_config()
298 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_0_setup_vmid_config()
300 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_0_setup_vmid_config()
302 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_0_setup_vmid_config()
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| A D | gfxhub_v1_0.c | 196 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in gfxhub_v1_0_init_cache_regs()
200 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in gfxhub_v1_0_init_cache_regs()
226 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, in gfxhub_v1_0_enable_system_domain()
267 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config()
269 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config()
272 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config()
274 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config()
276 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config()
278 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config()
357 tmp = REG_SET_FIELD(tmp, in gfxhub_v1_0_gart_disable()
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| A D | gfxhub_v2_1.c | 220 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v2_1_init_cache_regs()
223 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v2_1_init_cache_regs()
238 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v2_1_init_cache_regs()
242 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v2_1_init_cache_regs()
264 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL, in gfxhub_v2_1_enable_system_domain()
303 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_1_setup_vmid_config()
305 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_1_setup_vmid_config()
307 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_1_setup_vmid_config()
309 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_1_setup_vmid_config()
311 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_1_setup_vmid_config()
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| A D | mmhub_v2_0.c | 290 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, in mmhub_v2_0_init_cache_regs()
308 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v2_0_init_cache_regs()
312 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v2_0_init_cache_regs()
334 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, in mmhub_v2_0_enable_system_domain()
376 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_0_setup_vmid_config()
378 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_0_setup_vmid_config()
381 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_0_setup_vmid_config()
383 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_0_setup_vmid_config()
385 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_0_setup_vmid_config()
387 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_0_setup_vmid_config()
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| A D | mmhub_v2_3.c | 211 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, in mmhub_v2_3_init_cache_regs()
229 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v2_3_init_cache_regs()
233 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v2_3_init_cache_regs()
255 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, in mmhub_v2_3_enable_system_domain()
291 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_3_setup_vmid_config()
293 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_3_setup_vmid_config()
296 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_3_setup_vmid_config()
298 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_3_setup_vmid_config()
300 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_3_setup_vmid_config()
302 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_3_setup_vmid_config()
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| A D | hdp_v5_0.c | 67 hdp_clk_cntl = REG_SET_FIELD(hdp_clk_cntl, HDP_CLK_CNTL, in hdp_v5_0_update_mem_power_gating()
69 hdp_clk_cntl = REG_SET_FIELD(hdp_clk_cntl, HDP_CLK_CNTL, in hdp_v5_0_update_mem_power_gating()
97 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_0_update_mem_power_gating()
100 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_0_update_mem_power_gating()
104 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_0_update_mem_power_gating()
107 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_0_update_mem_power_gating()
111 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_0_update_mem_power_gating()
116 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_0_update_mem_power_gating()
120 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_0_update_mem_power_gating()
138 hdp_clk_cntl = REG_SET_FIELD(hdp_clk_cntl, HDP_CLK_CNTL, in hdp_v5_0_update_mem_power_gating()
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| A D | mmhub_v1_0.c | 181 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in mmhub_v1_0_init_cache_regs()
185 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in mmhub_v1_0_init_cache_regs()
203 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, in mmhub_v1_0_enable_system_domain()
248 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in mmhub_v1_0_setup_vmid_config()
250 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in mmhub_v1_0_setup_vmid_config()
253 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in mmhub_v1_0_setup_vmid_config()
255 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in mmhub_v1_0_setup_vmid_config()
257 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in mmhub_v1_0_setup_vmid_config()
259 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in mmhub_v1_0_setup_vmid_config()
352 tmp = REG_SET_FIELD(tmp, in mmhub_v1_0_gart_disable()
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| A D | gmc_v7_0.c | 101 blackout = REG_SET_FIELD(blackout, in gmc_v7_0_mc_stop()
530 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gmc_v7_0_set_fault_enable_default()
532 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gmc_v7_0_set_fault_enable_default()
534 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gmc_v7_0_set_fault_enable_default()
561 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v7_0_set_prt()
563 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v7_0_set_prt()
565 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v7_0_set_prt()
567 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v7_0_set_prt()
569 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v7_0_set_prt()
571 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v7_0_set_prt()
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| A D | dce_v10_0.c | 245 tmp = REG_SET_FIELD(tmp, GRPH_FLIP_CONTROL, in dce_v10_0_page_flip()
358 tmp = REG_SET_FIELD(tmp, DC_HPD_CONTROL, DC_HPD_EN, 1); in dce_v10_0_hpd_init()
362 tmp = REG_SET_FIELD(tmp, DC_HPD_TOGGLE_FILT_CNTL, in dce_v10_0_hpd_init()
365 tmp = REG_SET_FIELD(tmp, DC_HPD_TOGGLE_FILT_CNTL, in dce_v10_0_hpd_init()
400 tmp = REG_SET_FIELD(tmp, DC_HPD_CONTROL, DC_HPD_EN, 0); in dce_v10_0_hpd_fini()
2022 tmp = REG_SET_FIELD(tmp, GRPH_FLIP_CONTROL, in dce_v10_0_crtc_do_set_base()
2303 tmp = REG_SET_FIELD(tmp, CUR_CONTROL, CURSOR_EN, 0); in dce_v10_0_hide_cursor()
2319 tmp = REG_SET_FIELD(tmp, CUR_CONTROL, CURSOR_EN, 1); in dce_v10_0_show_cursor()
2320 tmp = REG_SET_FIELD(tmp, CUR_CONTROL, CURSOR_MODE, 2); in dce_v10_0_show_cursor()
3216 tmp = REG_SET_FIELD(tmp, LB_VBLANK_STATUS, VBLANK_ACK, 1); in dce_v10_0_crtc_vblank_int_ack()
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| A D | gmc_v8_0.c | 190 blackout = REG_SET_FIELD(blackout, in gmc_v8_0_mc_stop()
745 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gmc_v8_0_set_fault_enable_default()
747 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gmc_v8_0_set_fault_enable_default()
749 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gmc_v8_0_set_fault_enable_default()
778 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v8_0_set_prt()
780 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v8_0_set_prt()
782 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v8_0_set_prt()
784 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v8_0_set_prt()
786 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v8_0_set_prt()
788 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v8_0_set_prt()
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| A D | vega20_ih.c | 166 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, in vega20_ih_rb_cntl()
168 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, in vega20_ih_rb_cntl()
170 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, in vega20_ih_rb_cntl()
176 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, in vega20_ih_rb_cntl()
635 data = REG_SET_FIELD(data, IH_CLK_CTRL, in vega20_ih_update_clockgating_state()
637 data = REG_SET_FIELD(data, IH_CLK_CTRL, in vega20_ih_update_clockgating_state()
639 data = REG_SET_FIELD(data, IH_CLK_CTRL, in vega20_ih_update_clockgating_state()
641 data = REG_SET_FIELD(data, IH_CLK_CTRL, in vega20_ih_update_clockgating_state()
643 data = REG_SET_FIELD(data, IH_CLK_CTRL, in vega20_ih_update_clockgating_state()
645 data = REG_SET_FIELD(data, IH_CLK_CTRL, in vega20_ih_update_clockgating_state()
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| A D | nbio_v7_2.c | 104 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v7_2_sdma_doorbell_range()
107 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v7_2_sdma_doorbell_range()
111 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v7_2_sdma_doorbell_range()
126 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v7_2_vcn_doorbell_range()
129 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v7_2_vcn_doorbell_range()
132 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v7_2_vcn_doorbell_range()
183 ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, in nbio_v7_2_ih_doorbell_range()
357 data = REG_SET_FIELD(data, BIF1_PCIE_MST_CTRL_3, in nbio_v7_2_init_registers()
359 data = REG_SET_FIELD(data, BIF1_PCIE_MST_CTRL_3, in nbio_v7_2_init_registers()
366 data = REG_SET_FIELD(data, PCIE_CONFIG_CNTL, in nbio_v7_2_init_registers()
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| A D | dce_v11_0.c | 263 tmp = REG_SET_FIELD(tmp, GRPH_FLIP_CONTROL, in dce_v11_0_page_flip()
376 tmp = REG_SET_FIELD(tmp, DC_HPD_CONTROL, DC_HPD_EN, 1); in dce_v11_0_hpd_init()
380 tmp = REG_SET_FIELD(tmp, DC_HPD_TOGGLE_FILT_CNTL, in dce_v11_0_hpd_init()
383 tmp = REG_SET_FIELD(tmp, DC_HPD_TOGGLE_FILT_CNTL, in dce_v11_0_hpd_init()
417 tmp = REG_SET_FIELD(tmp, DC_HPD_CONTROL, DC_HPD_EN, 0); in dce_v11_0_hpd_fini()
2064 tmp = REG_SET_FIELD(tmp, GRPH_FLIP_CONTROL, in dce_v11_0_crtc_do_set_base()
2379 tmp = REG_SET_FIELD(tmp, CUR_CONTROL, CURSOR_EN, 0); in dce_v11_0_hide_cursor()
2395 tmp = REG_SET_FIELD(tmp, CUR_CONTROL, CURSOR_EN, 1); in dce_v11_0_show_cursor()
2396 tmp = REG_SET_FIELD(tmp, CUR_CONTROL, CURSOR_MODE, 2); in dce_v11_0_show_cursor()
3339 tmp = REG_SET_FIELD(tmp, LB_VBLANK_STATUS, VBLANK_ACK, 1); in dce_v11_0_crtc_vblank_int_ack()
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| A D | navi10_ih.c | 116 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL2, in force_update_wptr_for_self_int()
118 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL2, in force_update_wptr_for_self_int()
217 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, in navi10_ih_rb_cntl()
219 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, in navi10_ih_rb_cntl()
338 ih_chicken = REG_SET_FIELD(ih_chicken, in navi10_ih_irq_init()
344 ih_chicken = REG_SET_FIELD(ih_chicken, in navi10_ih_irq_init()
655 data = REG_SET_FIELD(data, IH_CLK_CTRL, in navi10_ih_update_clockgating_state()
657 data = REG_SET_FIELD(data, IH_CLK_CTRL, in navi10_ih_update_clockgating_state()
659 data = REG_SET_FIELD(data, IH_CLK_CTRL, in navi10_ih_update_clockgating_state()
661 data = REG_SET_FIELD(data, IH_CLK_CTRL, in navi10_ih_update_clockgating_state()
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| A D | mmhub_v1_7.c | 202 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in mmhub_v1_7_init_cache_regs()
206 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in mmhub_v1_7_init_cache_regs()
213 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, in mmhub_v1_7_init_cache_regs()
215 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, in mmhub_v1_7_init_cache_regs()
218 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, in mmhub_v1_7_init_cache_regs()
220 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, in mmhub_v1_7_init_cache_regs()
236 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, in mmhub_v1_7_enable_system_domain()
281 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in mmhub_v1_7_setup_vmid_config()
283 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in mmhub_v1_7_setup_vmid_config()
363 tmp = REG_SET_FIELD(tmp, in mmhub_v1_7_gart_disable()
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| A D | vega10_ih.c | 162 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, in vega10_ih_rb_cntl()
164 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, in vega10_ih_rb_cntl()
166 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, in vega10_ih_rb_cntl()
172 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, in vega10_ih_rb_cntl()
186 ih_doorbell_rtpr = REG_SET_FIELD(ih_doorbell_rtpr, in vega10_ih_doorbell_rptr()
588 data = REG_SET_FIELD(data, IH_CLK_CTRL, in vega10_ih_update_clockgating_state()
591 data = REG_SET_FIELD(data, IH_CLK_CTRL, in vega10_ih_update_clockgating_state()
593 data = REG_SET_FIELD(data, IH_CLK_CTRL, in vega10_ih_update_clockgating_state()
595 data = REG_SET_FIELD(data, IH_CLK_CTRL, in vega10_ih_update_clockgating_state()
597 data = REG_SET_FIELD(data, IH_CLK_CTRL, in vega10_ih_update_clockgating_state()
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| A D | tonga_ih.c | 64 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 1); in tonga_ih_enable_interrupts()
65 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, ENABLE_INTR, 1); in tonga_ih_enable_interrupts()
81 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 0); in tonga_ih_disable_interrupts()
82 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, ENABLE_INTR, 0); in tonga_ih_disable_interrupts()
126 ih_rb_cntl = REG_SET_FIELD(0, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1); in tonga_ih_irq_init()
130 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, MC_VMID, 0); in tonga_ih_irq_init()
133 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RPTR_REARM, 1); in tonga_ih_irq_init()
147 ih_doorbell_rtpr = REG_SET_FIELD(ih_doorbell_rtpr, IH_DOORBELL_RPTR, in tonga_ih_irq_init()
208 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in tonga_ih_get_wptr()
219 tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1); in tonga_ih_get_wptr()
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| A D | iceland_ih.c | 65 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL, ENABLE_INTR, 1); in iceland_ih_enable_interrupts()
66 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 1); in iceland_ih_enable_interrupts()
84 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 0); in iceland_ih_disable_interrupts()
85 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL, ENABLE_INTR, 0); in iceland_ih_disable_interrupts()
130 ih_rb_cntl = REG_SET_FIELD(0, IH_RB_CNTL, WPTR_OVERFLOW_ENABLE, 1); in iceland_ih_irq_init()
132 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_SIZE, rb_bufsz); in iceland_ih_irq_init()
149 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL, MC_VMID, 0); in iceland_ih_irq_init()
152 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL, RPTR_REARM, 1); in iceland_ih_irq_init()
206 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in iceland_ih_get_wptr()
215 tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1); in iceland_ih_get_wptr()
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| A D | cz_ih.c | 65 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL, ENABLE_INTR, 1); in cz_ih_enable_interrupts()
66 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 1); in cz_ih_enable_interrupts()
84 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 0); in cz_ih_disable_interrupts()
85 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL, ENABLE_INTR, 0); in cz_ih_disable_interrupts()
130 ih_rb_cntl = REG_SET_FIELD(0, IH_RB_CNTL, WPTR_OVERFLOW_ENABLE, 1); in cz_ih_irq_init()
132 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_SIZE, rb_bufsz); in cz_ih_irq_init()
149 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL, MC_VMID, 0); in cz_ih_irq_init()
152 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL, RPTR_REARM, 1); in cz_ih_irq_init()
206 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in cz_ih_get_wptr()
216 tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1); in cz_ih_get_wptr()
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| A D | mes_v10_1.c | 430 data = REG_SET_FIELD(data, CP_MES_DC_OP_CNTL, in mes_v10_1_enable()
440 data = REG_SET_FIELD(data, CP_MES_CNTL, in mes_v10_1_enable()
624 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v10_1_mqd_init()
626 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v10_1_mqd_init()
628 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v10_1_mqd_init()
630 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v10_1_mqd_init()
634 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v10_1_mqd_init()
652 tmp = REG_SET_FIELD(tmp, CP_MQD_CONTROL, VMID, 0); in mes_v10_1_mqd_init()
690 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v10_1_mqd_init()
735 data = REG_SET_FIELD(data, CP_HQD_VMID, VMID, 0); in mes_v10_1_queue_init_register()
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| A D | mmhub_v9_4.c | 208 tmp = REG_SET_FIELD(tmp, VML2PF0_VM_L2_CNTL, in mmhub_v9_4_init_cache_regs()
210 tmp = REG_SET_FIELD(tmp, VML2PF0_VM_L2_CNTL, in mmhub_v9_4_init_cache_regs()
213 tmp = REG_SET_FIELD(tmp, VML2PF0_VM_L2_CNTL, in mmhub_v9_4_init_cache_regs()
215 tmp = REG_SET_FIELD(tmp, VML2PF0_VM_L2_CNTL, in mmhub_v9_4_init_cache_regs()
217 tmp = REG_SET_FIELD(tmp, VML2PF0_VM_L2_CNTL, in mmhub_v9_4_init_cache_regs()
219 tmp = REG_SET_FIELD(tmp, VML2PF0_VM_L2_CNTL, in mmhub_v9_4_init_cache_regs()
226 tmp = REG_SET_FIELD(tmp, VML2PF0_VM_L2_CNTL2, in mmhub_v9_4_init_cache_regs()
417 tmp = REG_SET_FIELD(tmp, in mmhub_v9_4_gart_disable()
463 tmp = REG_SET_FIELD(tmp, in mmhub_v9_4_set_fault_enable_default()
486 tmp = REG_SET_FIELD(tmp, in mmhub_v9_4_set_fault_enable_default()
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| A D | nbio_v6_1.c | 98 doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, OFFSET, doorbell_index); in nbio_v6_1_sdma_doorbell_range()
99 doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, doorbell_size); in nbio_v6_1_sdma_doorbell_range()
101 doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, 0); in nbio_v6_1_sdma_doorbell_range()
139 …ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, OFFSET, doorbell_index… in nbio_v6_1_ih_doorbell_range()
140 ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, in nbio_v6_1_ih_doorbell_range()
143 ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, SIZE, 0); in nbio_v6_1_ih_doorbell_range()
158 interrupt_cntl = REG_SET_FIELD(interrupt_cntl, INTERRUPT_CNTL, IH_DUMMY_RD_OVERRIDE, 0); in nbio_v6_1_ih_control()
160 interrupt_cntl = REG_SET_FIELD(interrupt_cntl, INTERRUPT_CNTL, IH_REQ_NONSNOOP_EN, 0); in nbio_v6_1_ih_control()
268 data = REG_SET_FIELD(data, PCIE_CONFIG_CNTL, CI_SWUS_MAX_READ_REQUEST_SIZE_MODE, 1); in nbio_v6_1_init_registers()
269 data = REG_SET_FIELD(data, PCIE_CONFIG_CNTL, CI_SWUS_MAX_READ_REQUEST_SIZE_PRIV, 1); in nbio_v6_1_init_registers()
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| A D | nbio_v7_0.c | 77 doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, OFFSET, doorbell_index); in nbio_v7_0_sdma_doorbell_range()
78 doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, doorbell_size); in nbio_v7_0_sdma_doorbell_range()
80 doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, 0); in nbio_v7_0_sdma_doorbell_range()
93 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v7_0_vcn_doorbell_range()
96 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v7_0_vcn_doorbell_range()
99 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v7_0_vcn_doorbell_range()
123 …ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, OFFSET, doorbell_index… in nbio_v7_0_ih_doorbell_range()
124 ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, SIZE, 2); in nbio_v7_0_ih_doorbell_range()
126 ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, SIZE, 0); in nbio_v7_0_ih_doorbell_range()
233 interrupt_cntl = REG_SET_FIELD(interrupt_cntl, INTERRUPT_CNTL, IH_DUMMY_RD_OVERRIDE, 0); in nbio_v7_0_ih_control()
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| A D | smu_v11_0_i2c.c | 117 reg = REG_SET_FIELD(reg, CKSVII2C_IC_CON, IC_RESTART_EN, 1); in smu_v11_0_i2c_configure()
302 reg = REG_SET_FIELD(reg, CKSVII2C_IC_DATA_CMD, DAT, in smu_v11_0_i2c_transmit()
310 reg = REG_SET_FIELD(reg, in smu_v11_0_i2c_transmit()
315 reg = REG_SET_FIELD(reg, in smu_v11_0_i2c_transmit()
320 reg = REG_SET_FIELD(reg, CKSVII2C_IC_DATA_CMD, CMD, 0); in smu_v11_0_i2c_transmit()
380 reg = REG_SET_FIELD(reg, CKSVII2C_IC_DATA_CMD, DAT, 0); in smu_v11_0_i2c_receive()
382 reg = REG_SET_FIELD(reg, CKSVII2C_IC_DATA_CMD, CMD, 1); in smu_v11_0_i2c_receive()
388 reg = REG_SET_FIELD(reg, CKSVII2C_IC_DATA_CMD, in smu_v11_0_i2c_receive()
392 reg = REG_SET_FIELD(reg, CKSVII2C_IC_DATA_CMD, in smu_v11_0_i2c_receive()
438 reg = REG_SET_FIELD(reg, CKSVII2C_IC_ENABLE, ENABLE, 1); in smu_v11_0_i2c_abort()
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| A D | nbio_v7_4.c | 175 doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, 0); in nbio_v7_4_sdma_doorbell_range()
197 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v7_4_vcn_doorbell_range()
200 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v7_4_vcn_doorbell_range()
203 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v7_4_vcn_doorbell_range()
241 ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, SIZE, 4); in nbio_v7_4_ih_doorbell_range()
243 ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, SIZE, 0); in nbio_v7_4_ih_doorbell_range()
385 bif_doorbell_intr_cntl = REG_SET_FIELD(bif_doorbell_intr_cntl, in nbio_v7_4_handle_ras_controller_intr_no_bifring()
441 bif_doorbell_intr_cntl = REG_SET_FIELD(bif_doorbell_intr_cntl, in nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring()
474 bif_intr_cntl = REG_SET_FIELD(bif_intr_cntl, in nbio_v7_4_set_ras_controller_irq_state()
519 bif_intr_cntl = REG_SET_FIELD(bif_intr_cntl, in nbio_v7_4_set_ras_err_event_athub_irq_state()
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