1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2 /* Copyright(c) 2007 - 2011 Realtek Corporation. */ 3 4 #ifndef __RTL8188E_HAL_H__ 5 #define __RTL8188E_HAL_H__ 6 7 /* include HAL Related header after HAL Related compiling flags */ 8 #include "rtl8188e_spec.h" 9 #include "Hal8188EPhyReg.h" 10 #include "Hal8188EPhyCfg.h" 11 #include "rtl8188e_rf.h" 12 #include "rtl8188e_dm.h" 13 #include "rtl8188e_recv.h" 14 #include "rtl8188e_xmit.h" 15 #include "rtl8188e_cmd.h" 16 #include "Hal8188EPwrSeq.h" 17 #include "rtl8188e_sreset.h" 18 #include "rtw_efuse.h" 19 20 #include "odm_precomp.h" 21 22 /* RTL8188E Power Configuration CMDs for USB/SDIO interfaces */ 23 #define Rtl8188E_NIC_PWR_ON_FLOW rtl8188E_power_on_flow 24 #define Rtl8188E_NIC_DISABLE_FLOW rtl8188E_card_disable_flow 25 #define Rtl8188E_NIC_LPS_ENTER_FLOW rtl8188E_enter_lps_flow 26 27 #define DRVINFO_SZ 4 /* unit is 8bytes */ 28 #define PageNum_128(_Len) (u32)(((_Len)>>7) + ((_Len) & 0x7F ? 1 : 0)) 29 30 /* download firmware related data structure */ 31 #define FW_8188E_SIZE 0x4000 /* 16384,16k */ 32 #define FW_8188E_START_ADDRESS 0x1000 33 34 #define MAX_PAGE_SIZE 4096 /* @ page : 4k bytes */ 35 36 #define IS_FW_HEADER_EXIST(_pFwHdr) \ 37 ((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x92C0 || \ 38 (le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88C0 || \ 39 (le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x2300 || \ 40 (le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88E0) 41 42 /* This structure must be careful with byte-ordering */ 43 44 struct rt_firmware_hdr { 45 /* 8-byte alinment required */ 46 /* LONG WORD 0 ---- */ 47 __le16 Signature; /* 92C0: test chip; 92C, 48 * 88C0: test chip; 88C1: MP A-cut; 49 * 92C1: MP A-cut */ 50 u8 Category; /* AP/NIC and USB/PCI */ 51 u8 Function; /* Reserved for different FW function 52 * indcation, for further use when 53 * driver needs to download different 54 * FW for different conditions */ 55 __le16 Version; /* FW Version */ 56 u8 Subversion; /* FW Subversion, default 0x00 */ 57 u16 Rsvd1; 58 59 /* LONG WORD 1 ---- */ 60 u8 Month; /* Release time Month field */ 61 u8 Date; /* Release time Date field */ 62 u8 Hour; /* Release time Hour field */ 63 u8 Minute; /* Release time Minute field */ 64 __le16 RamCodeSize; /* The size of RAM code */ 65 u8 Foundry; 66 u8 Rsvd2; 67 68 /* LONG WORD 2 ---- */ 69 __le32 SvnIdx; /* The SVN entry index */ 70 u32 Rsvd3; 71 72 /* LONG WORD 3 ---- */ 73 u32 Rsvd4; 74 u32 Rsvd5; 75 }; 76 77 #define DRIVER_EARLY_INT_TIME 0x05 78 #define BCN_DMA_ATIME_INT_TIME 0x02 79 80 enum usb_rx_agg_mode { 81 USB_RX_AGG_DISABLE, 82 USB_RX_AGG_DMA, 83 USB_RX_AGG_USB, 84 USB_RX_AGG_MIX 85 }; 86 87 #define MAX_RX_DMA_BUFFER_SIZE_88E \ 88 0x2400 /* 9k for 88E nornal chip , MaxRxBuff=10k-max(TxReportSize(64*8), 89 * WOLPattern(16*24)) */ 90 91 #define TX_SELE_HQ BIT(0) /* High Queue */ 92 #define TX_SELE_LQ BIT(1) /* Low Queue */ 93 #define TX_SELE_NQ BIT(2) /* Normal Queue */ 94 95 /* Note: We will divide number of page equally for each queue other 96 * than public queue! */ 97 /* 22k = 22528 bytes = 176 pages (@page = 128 bytes) */ 98 /* must reserved about 7 pages for LPS => 176-7 = 169 (0xA9) */ 99 /* 2*BCN / 1*ps-poll / 1*null-data /1*prob_rsp /1*QOS null-data /1*BT QOS 100 * null-data */ 101 102 #define TX_TOTAL_PAGE_NUMBER_88E 0xA9/* 169 (21632=> 21k) */ 103 104 #define TX_PAGE_BOUNDARY_88E (TX_TOTAL_PAGE_NUMBER_88E + 1) 105 106 /* Note: For Normal Chip Setting ,modify later */ 107 #define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER \ 108 TX_TOTAL_PAGE_NUMBER_88E /* 0xA9 , 0xb0=>176=>22k */ 109 #define WMM_NORMAL_TX_PAGE_BOUNDARY_88E \ 110 (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER + 1) /* 0xA9 */ 111 112 #include "HalVerDef.h" 113 #include "hal_com.h" 114 115 /* Channel Plan */ 116 enum ChannelPlan { 117 CHPL_FCC = 0, 118 CHPL_IC = 1, 119 CHPL_ETSI = 2, 120 CHPL_SPA = 3, 121 CHPL_FRANCE = 4, 122 CHPL_MKK = 5, 123 CHPL_MKK1 = 6, 124 CHPL_ISRAEL = 7, 125 CHPL_TELEC = 8, 126 CHPL_GLOBAL = 9, 127 CHPL_WORLD = 10, 128 }; 129 130 struct txpowerinfo24g { 131 u8 IndexCCK_Base[RF_PATH_MAX][MAX_CHNL_GROUP_24G]; 132 u8 IndexBW40_Base[RF_PATH_MAX][MAX_CHNL_GROUP_24G]; 133 /* If only one tx, only BW20 and OFDM are used. */ 134 s8 CCK_Diff[RF_PATH_MAX][MAX_TX_COUNT]; 135 s8 OFDM_Diff[RF_PATH_MAX][MAX_TX_COUNT]; 136 s8 BW20_Diff[RF_PATH_MAX][MAX_TX_COUNT]; 137 s8 BW40_Diff[RF_PATH_MAX][MAX_TX_COUNT]; 138 }; 139 140 #define EFUSE_REAL_CONTENT_LEN 512 141 #define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN) 142 143 #define EFUSE_REAL_CONTENT_LEN_88E 256 144 #define EFUSE_MAP_LEN_88E 512 145 #define EFUSE_MAX_SECTION_88E 64 146 /* To prevent out of boundary programming case, leave 1byte and program 147 * full section */ 148 /* 9bytes + 1byt + 5bytes and pre 1byte. */ 149 /* For worst case: */ 150 /* | 2byte|----8bytes----|1byte|--7bytes--| 92D */ 151 /* PG data exclude header, dummy 7 bytes frome CP test and reserved 1byte. */ 152 #define EFUSE_OOB_PROTECT_BYTES_88E 18 153 154 #define EFUSE_PROTECT_BYTES_BANK 16 155 156 struct hal_data_8188e { 157 struct HAL_VERSION VersionID; 158 u16 FirmwareVersion; 159 u16 FirmwareVersionRev; 160 u16 FirmwareSubVersion; 161 u16 FirmwareSignature; 162 u8 PGMaxGroup; 163 /* current WIFI_PHY values */ 164 u32 ReceiveConfig; 165 enum ht_channel_width CurrentChannelBW; 166 u8 CurrentChannel; 167 u8 nCur40MhzPrimeSC;/* Control channel sub-carrier */ 168 169 u16 BasicRateSet; 170 171 /* rf_ctrl */ 172 u8 rf_chip; 173 u8 rf_type; 174 175 u8 BoardType; 176 177 /* EEPROM setting. */ 178 u16 EEPROMVID; 179 u16 EEPROMPID; 180 u16 EEPROMSVID; 181 u16 EEPROMSDID; 182 u8 EEPROMCustomerID; 183 u8 EEPROMSubCustomerID; 184 u8 EEPROMVersion; 185 u8 EEPROMRegulatory; 186 187 u8 bTXPowerDataReadFromEEPORM; 188 u8 EEPROMThermalMeter; 189 u8 bAPKThermalMeterIgnore; 190 191 bool EepromOrEfuse; 192 struct efuse_hal EfuseHal; 193 194 u8 Index24G_CCK_Base[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; 195 u8 Index24G_BW40_Base[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; 196 /* If only one tx, only BW20 and OFDM are used. */ 197 s8 CCK_24G_Diff[RF_PATH_MAX][MAX_TX_COUNT]; 198 s8 OFDM_24G_Diff[RF_PATH_MAX][MAX_TX_COUNT]; 199 s8 BW20_24G_Diff[RF_PATH_MAX][MAX_TX_COUNT]; 200 s8 BW40_24G_Diff[RF_PATH_MAX][MAX_TX_COUNT]; 201 202 u8 TxPwrLevelCck[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; 203 /* For HT 40MHZ pwr */ 204 u8 TxPwrLevelHT40_1S[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; 205 /* For HT 40MHZ pwr */ 206 u8 TxPwrLevelHT40_2S[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; 207 /* HT 20<->40 Pwr diff */ 208 u8 TxPwrHt20Diff[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; 209 /* For HT<->legacy pwr diff */ 210 u8 TxPwrLegacyHtDiff[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; 211 /* For power group */ 212 u8 PwrGroupHT20[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; 213 u8 PwrGroupHT40[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; 214 215 u8 LegacyHTTxPowerDiff;/* Legacy to HT rate power diff */ 216 /* The current Tx Power Level */ 217 u8 CurrentCckTxPwrIdx; 218 u8 CurrentOfdm24GTxPwrIdx; 219 u8 CurrentBW2024GTxPwrIdx; 220 u8 CurrentBW4024GTxPwrIdx; 221 222 /* Read/write are allow for following hardware information variables */ 223 u8 framesync; 224 u32 framesyncC34; 225 u8 framesyncMonitor; 226 u8 DefaultInitialGain[4]; 227 u8 pwrGroupCnt; 228 u32 MCSTxPowerLevelOriginalOffset[MAX_PG_GROUP][16]; 229 u32 CCKTxPowerLevelOriginalOffset; 230 231 u8 CrystalCap; 232 u32 AntennaTxPath; /* Antenna path Tx */ 233 u32 AntennaRxPath; /* Antenna path Rx */ 234 u8 ExternalPA; 235 236 u8 bLedOpenDrain; /* Open-drain support for controlling the LED.*/ 237 238 u8 b1x1RecvCombine; /* for 1T1R receive combining */ 239 240 u32 AcParam_BE; /* Original parameter for BE, use for EDCA turbo. */ 241 242 struct bb_reg_def PHYRegDef[4]; /* Radio A/B/C/D */ 243 244 u32 RfRegChnlVal[2]; 245 246 /* RDG enable */ 247 bool bRDGEnable; 248 249 /* for host message to fw */ 250 u8 LastHMEBoxNum; 251 252 u8 fw_ractrl; 253 u8 RegFwHwTxQCtrl; 254 u8 RegReg542; 255 u8 RegCR_1; 256 257 struct dm_priv dmpriv; 258 struct odm_dm_struct odmpriv; 259 260 u8 CurAntenna; 261 u8 AntDivCfg; 262 u8 TRxAntDivType; 263 264 u8 bDumpRxPkt;/* for debug */ 265 u8 bDumpTxPkt;/* for debug */ 266 u8 FwRsvdPageStartOffset; /* Reserve page start offset except 267 * beacon in TxQ. */ 268 269 /* 2010/08/09 MH Add CU power down mode. */ 270 bool pwrdown; 271 272 /* Add for dual MAC 0--Mac0 1--Mac1 */ 273 u32 interfaceIndex; 274 275 u8 OutEpQueueSel; 276 u8 OutEpNumber; 277 278 /* Add for USB aggreation mode dynamic shceme. */ 279 bool UsbRxHighSpeedMode; 280 281 /* 2010/11/22 MH Add for slim combo debug mode selective. */ 282 /* This is used for fix the drawback of CU TSMC-A/UMC-A cut. 283 * HW auto suspend ability. Close BT clock. */ 284 bool SlimComboDbg; 285 286 u16 EfuseUsedBytes; 287 288 struct P2P_PS_Offload_t p2p_ps_offload; 289 290 /* Auto FSM to Turn On, include clock, isolation, power control 291 * for MAC only */ 292 u8 bMacPwrCtrlOn; 293 294 u32 UsbBulkOutSize; 295 296 /* Interrupt relatd register information. */ 297 u32 IntArray[3];/* HISR0,HISR1,HSISR */ 298 u8 C2hArray[16]; 299 u8 UsbTxAggMode; 300 u8 UsbTxAggDescNum; 301 u32 MaxUsbRxAggBlock; 302 303 enum usb_rx_agg_mode UsbRxAggMode; 304 u8 UsbRxAggBlockCount; /* USB Block count. Block size is 305 * 512-byte in high speed and 64-byte 306 * in full speed */ 307 u8 UsbRxAggBlockTimeout; 308 u8 UsbRxAggPageCount; /* 8192C DMA page count */ 309 u8 UsbRxAggPageTimeout; 310 }; 311 312 #define GET_HAL_DATA(__pAdapter) \ 313 ((struct hal_data_8188e *)((__pAdapter)->HalData)) 314 315 /* rtl8188e_hal_init.c */ 316 s32 rtl8188e_FirmwareDownload(struct adapter *padapter); 317 void _8051Reset88E(struct adapter *padapter); 318 void rtl8188e_InitializeFirmwareVars(struct adapter *padapter); 319 320 s32 InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy); 321 322 /* EFuse */ 323 u8 GetEEPROMSize8188E(struct adapter *padapter); 324 void Hal_InitPGData88E(struct adapter *padapter); 325 void Hal_EfuseParseIDCode88E(struct adapter *padapter, u8 *hwinfo); 326 void Hal_ReadTxPowerInfo88E(struct adapter *padapter, u8 *hwinfo, 327 bool AutoLoadFail); 328 329 void Hal_EfuseParseEEPROMVer88E(struct adapter *padapter, u8 *hwinfo, 330 bool AutoLoadFail); 331 void rtl8188e_EfuseParseChnlPlan(struct adapter *padapter, u8 *hwinfo, 332 bool AutoLoadFail); 333 void Hal_EfuseParseCustomerID88E(struct adapter *padapter, u8 *hwinfo, 334 bool AutoLoadFail); 335 void Hal_ReadAntennaDiversity88E(struct adapter *pAdapter,u8 *PROMContent, 336 bool AutoLoadFail); 337 void Hal_ReadThermalMeter_88E(struct adapter * dapter, u8 *PROMContent, 338 bool AutoloadFail); 339 void Hal_EfuseParseXtal_8188E(struct adapter *pAdapter, u8 *hwinfo, 340 bool AutoLoadFail); 341 void Hal_EfuseParseBoardType88E(struct adapter *pAdapter, u8 *hwinfo, 342 bool AutoLoadFail); 343 void Hal_ReadPowerSavingMode88E(struct adapter *pAdapter, u8 *hwinfo, 344 bool AutoLoadFail); 345 346 void rtl8188e_read_chip_version(struct adapter *padapter); 347 348 s32 rtl8188e_iol_efuse_patch(struct adapter *padapter); 349 void rtw_cancel_all_timer(struct adapter *padapter); 350 void _ps_open_RF(struct adapter *adapt); 351 352 #endif /* __RTL8188E_HAL_H__ */ 353