Searched refs:SMU_DCEFCLK (Results 1 – 7 of 7) sorted by relevance
213 case SMU_DCEFCLK: in renoir_get_dpm_clk_limited()558 case SMU_DCEFCLK: in renoir_print_clk_levels()583 case SMU_DCEFCLK: in renoir_print_clk_levels()
250 SMU_DCEFCLK, enumerator
1079 SMU_DCEFCLK, in navi10_set_default_dpm_table()1293 case SMU_DCEFCLK: in navi10_print_clk_levels()1488 case SMU_DCEFCLK: in navi10_force_clk_levels()1599 case SMU_DCEFCLK: in navi10_get_clock_by_type_with_latency()
912 SMU_DCEFCLK); in smu_v11_0_init_max_sustainable_clocks()1109 clk_select = SMU_DCEFCLK; in smu_v11_0_display_clock_voltage_request()
798 SMU_DCEFCLK, in sienna_cichlid_set_default_dpm_table()1027 case SMU_DCEFCLK: in sienna_cichlid_print_clk_levels()1208 case SMU_DCEFCLK: in sienna_cichlid_force_clk_levels()
885 SMU_DCEFCLK); in smu_v13_0_init_max_sustainable_clocks()1027 clk_select = SMU_DCEFCLK; in smu_v13_0_display_clock_voltage_request()
1981 clk_type = SMU_DCEFCLK; break; in smu_force_ppclk_levels()2420 clk_type = SMU_DCEFCLK; break; in smu_print_ppclk_levels()2732 clk_type = SMU_DCEFCLK; in smu_get_clock_by_type_with_latency()
Completed in 31 milliseconds