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Searched refs:TI_CLK_GATE (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/clk/ti/
A Dclk-44xx.c269 { 8, TI_CLK_GATE, omap4_iss_ctrlclk_parents, NULL },
315 { 8, TI_CLK_GATE, omap4_dss_dss_clk_parents, NULL },
316 { 9, TI_CLK_GATE, omap4_dss_48mhz_clk_parents, NULL },
317 { 10, TI_CLK_GATE, omap4_dss_sys_clk_parents, NULL },
318 { 11, TI_CLK_GATE, omap4_dss_tv_clk_parents, NULL },
508 { 8, TI_CLK_GATE, omap4_gpio2_dbclk_parents, NULL },
513 { 8, TI_CLK_GATE, omap4_gpio2_dbclk_parents, NULL },
518 { 8, TI_CLK_GATE, omap4_gpio2_dbclk_parents, NULL },
523 { 8, TI_CLK_GATE, omap4_gpio2_dbclk_parents, NULL },
528 { 8, TI_CLK_GATE, omap4_gpio2_dbclk_parents, NULL },
[all …]
A Dclk-54xx.c236 { 8, TI_CLK_GATE, omap5_gpio2_dbclk_parents, NULL },
241 { 8, TI_CLK_GATE, omap5_gpio2_dbclk_parents, NULL },
246 { 8, TI_CLK_GATE, omap5_gpio2_dbclk_parents, NULL },
251 { 8, TI_CLK_GATE, omap5_gpio2_dbclk_parents, NULL },
256 { 8, TI_CLK_GATE, omap5_gpio2_dbclk_parents, NULL },
261 { 8, TI_CLK_GATE, omap5_gpio2_dbclk_parents, NULL },
266 { 8, TI_CLK_GATE, omap5_gpio2_dbclk_parents, NULL },
340 { 8, TI_CLK_GATE, omap5_dss_dss_clk_parents, NULL },
342 { 10, TI_CLK_GATE, omap5_dss_sys_clk_parents, NULL },
401 { 8, TI_CLK_GATE, omap5_gpio2_dbclk_parents, NULL },
[all …]
A Dclk-7xx-compat.c232 { 8, TI_CLK_GATE, dra7_dss_dss_clk_parents, NULL },
233 { 9, TI_CLK_GATE, dra7_dss_48mhz_clk_parents, NULL },
234 { 10, TI_CLK_GATE, dra7_dss_hdmi_clk_parents, NULL },
235 { 11, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },
264 { 8, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },
281 { 8, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },
303 { 8, TI_CLK_GATE, dra7_sata_ref_clk_parents, NULL },
318 { 8, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },
325 { 8, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },
419 { 8, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },
[all …]
A Dclk-7xx.c292 { 8, TI_CLK_GATE, dra7_dss_dss_clk_parents, NULL },
293 { 9, TI_CLK_GATE, dra7_dss_48mhz_clk_parents, NULL },
294 { 10, TI_CLK_GATE, dra7_dss_hdmi_clk_parents, NULL },
295 { 11, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },
349 { 8, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },
366 { 8, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },
388 { 8, TI_CLK_GATE, dra7_sata_ref_clk_parents, NULL },
421 { 8, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },
428 { 8, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },
512 { 8, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },
[all …]
A Dclk-43xx-compat.c32 { 8, TI_CLK_GATE, am4_synctimer_32kclk_parents, NULL },
42 { 8, TI_CLK_GATE, am4_gpio0_dbclk_parents, NULL },
83 { 8, TI_CLK_GATE, am4_usb_otg_ss0_refclk960m_parents, NULL },
88 { 8, TI_CLK_GATE, am4_usb_otg_ss0_refclk960m_parents, NULL },
98 { 8, TI_CLK_GATE, am4_gpio1_dbclk_parents, NULL },
103 { 8, TI_CLK_GATE, am4_gpio1_dbclk_parents, NULL },
108 { 8, TI_CLK_GATE, am4_gpio1_dbclk_parents, NULL },
113 { 8, TI_CLK_GATE, am4_gpio1_dbclk_parents, NULL },
118 { 8, TI_CLK_GATE, am4_gpio1_dbclk_parents, NULL },
A Dclk-43xx.c37 { 8, TI_CLK_GATE, am4_synctimer_32kclk_parents, NULL },
53 { 8, TI_CLK_GATE, am4_gpio0_dbclk_parents, NULL },
106 { 8, TI_CLK_GATE, am4_usb_otg_ss0_refclk960m_parents, NULL },
111 { 8, TI_CLK_GATE, am4_usb_otg_ss0_refclk960m_parents, NULL },
140 { 8, TI_CLK_GATE, am4_gpio1_dbclk_parents, NULL },
145 { 8, TI_CLK_GATE, am4_gpio1_dbclk_parents, NULL },
150 { 8, TI_CLK_GATE, am4_gpio1_dbclk_parents, NULL },
155 { 8, TI_CLK_GATE, am4_gpio1_dbclk_parents, NULL },
160 { 8, TI_CLK_GATE, am4_gpio1_dbclk_parents, NULL },
A Dclk-33xx-compat.c32 { 18, TI_CLK_GATE, am3_gpio1_dbclk_parents, NULL },
37 { 18, TI_CLK_GATE, am3_gpio1_dbclk_parents, NULL },
42 { 18, TI_CLK_GATE, am3_gpio1_dbclk_parents, NULL },
107 { 18, TI_CLK_GATE, am3_gpio0_dbclk_parents, NULL },
148 { 19, TI_CLK_GATE, am3_dbg_sysclk_ck_parents, NULL },
153 { 30, TI_CLK_GATE, am3_dbg_clka_ck_parents, NULL },
A Dclk-33xx.c32 { 18, TI_CLK_GATE, am3_gpio1_dbclk_parents, NULL },
37 { 18, TI_CLK_GATE, am3_gpio1_dbclk_parents, NULL },
42 { 18, TI_CLK_GATE, am3_gpio1_dbclk_parents, NULL },
135 { 18, TI_CLK_GATE, am3_gpio0_dbclk_parents, NULL },
190 { 19, TI_CLK_GATE, am3_dbg_sysclk_ck_parents, NULL },
195 { 30, TI_CLK_GATE, am3_dbg_clka_ck_parents, NULL },
A Dclock.h53 TI_CLK_GATE, enumerator
A Dclkctrl.c442 case TI_CLK_GATE: in _ti_clkctrl_setup_subclks()

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