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Searched refs:clk_phase (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/clk/socfpga/
A Dclk-gate-a10.c43 u32 clk_phase[2]; in socfpga_clk_prepare() local
45 if (socfpgaclk->clk_phase[0] || socfpgaclk->clk_phase[1]) { in socfpga_clk_prepare()
49 clk_phase[i] = 0; in socfpga_clk_prepare()
52 clk_phase[i] = 1; in socfpga_clk_prepare()
55 clk_phase[i] = 2; in socfpga_clk_prepare()
58 clk_phase[i] = 3; in socfpga_clk_prepare()
61 clk_phase[i] = 4; in socfpga_clk_prepare()
78 hs_timing = SYSMGR_SDMMC_CTRL_SET_AS10(clk_phase[0], clk_phase[1]); in socfpga_clk_prepare()
99 u32 clk_phase[2]; in __socfpga_gate_init() local
141 socfpga_clk->clk_phase[0] = clk_phase[0]; in __socfpga_gate_init()
[all …]
A Dclk-gate.c117 u32 clk_phase[2]; in socfpga_clk_prepare() local
119 if (socfpgaclk->clk_phase[0] || socfpgaclk->clk_phase[1]) { in socfpga_clk_prepare()
129 clk_phase[i] = 0; in socfpga_clk_prepare()
132 clk_phase[i] = 1; in socfpga_clk_prepare()
135 clk_phase[i] = 2; in socfpga_clk_prepare()
138 clk_phase[i] = 3; in socfpga_clk_prepare()
141 clk_phase[i] = 4; in socfpga_clk_prepare()
157 hs_timing = SYSMGR_SDMMC_CTRL_SET(clk_phase[0], clk_phase[1]); in socfpga_clk_prepare()
175 u32 clk_phase[2]; in socfpga_gate_init() local
223 socfpga_clk->clk_phase[0] = clk_phase[0]; in socfpga_gate_init()
[all …]
A Dclk.h53 u32 clk_phase[2]; member
/linux/include/trace/events/
A Dclk.h198 DECLARE_EVENT_CLASS(clk_phase,
217 DEFINE_EVENT(clk_phase, clk_set_phase,
224 DEFINE_EVENT(clk_phase, clk_set_phase_complete,
/linux/sound/soc/codecs/
A Dlm49453.c1146 int clk_phase = 0; in lm49453_set_dai_fmt() local
1173 clk_phase = (1 << 5); in lm49453_set_dai_fmt()
1178 clk_phase = (1 << 5); in lm49453_set_dai_fmt()
1187 (aif_val | mode | clk_phase)); in lm49453_set_dai_fmt()
/linux/drivers/mmc/host/
A Dsdhci-of-arasan.c1037 u32 clk_phase[2] = {0}; in arasan_dt_read_clk_phase() local
1044 ret = of_property_read_variable_u32_array(np, prop, &clk_phase[0], in arasan_dt_read_clk_phase()
1054 clk_data->clk_phase_in[timing] = clk_phase[0]; in arasan_dt_read_clk_phase()
1055 clk_data->clk_phase_out[timing] = clk_phase[1]; in arasan_dt_read_clk_phase()

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