Searched refs:ddr50 (Results 1 – 25 of 29) sorted by relevance
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| /linux/Documentation/devicetree/bindings/mmc/ |
| A D | sdhci-omap.txt | 19 "ddr50-rev11", "sdr104-rev11", "ddr50", "sdr104",
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| A D | sdhci-st.txt | 57 - sd-uhs-ddr50: To enable the DDR50 in the mmcss.
109 sd-uhs-ddr50;
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| A D | brcm,sdhci-brcmstb.txt | 22 sd-uhs-ddr50;
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| A D | cdns,sdhci.yaml | 68 cdns,phy-input-delay-sd-uhs-ddr50:
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| A D | mmc-controller.yaml | 153 sd-uhs-ddr50:
339 "^clk-phase-(legacy|sd-hs|mmc-(hs|hs[24]00|ddr52)|uhs-(sdr(12|25|50|104)|ddr50))$":
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| A D | sdhci-am654.yaml | 98 ti,otap-del-sel-ddr50:
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| /linux/arch/arm/boot/dts/ |
| A D | stih410-b2120.dts | 33 sd-uhs-ddr50;
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| A D | stih418-b2199.dts | 83 sd-uhs-ddr50;
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| A D | dra72-evm.dts | 94 pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
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| A D | dra72-evm-revc.dts | 124 pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
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| A D | dra7-evm.dts | 389 …pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50-rev11", "sdr104-rev11", "ddr50"…
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| A D | dra71-evm.dts | 203 pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
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| A D | imx6qdl-skov-cpu.dtsi | 319 sd-uhs-ddr50;
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| A D | stm32mp157c-ed1.dts | 361 sd-uhs-ddr50;
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| A D | rk3288-firefly-reload.dts | 265 sd-uhs-ddr50;
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| A D | exynos5420-arndale-octa.dts | 807 sd-uhs-ddr50;
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| /linux/arch/arm64/boot/dts/xilinx/ |
| A D | zynqmp-sck-kv-g-revB.dts | 117 clk-phase-uhs-ddr50 = <126>, <48>;
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| /linux/arch/arm64/boot/dts/amlogic/ |
| A D | meson-gxl-s905x-libretech-cc-v2.dts | 251 sd-uhs-ddr50;
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| A D | meson-gx-libretech-pc.dtsi | 382 sd-uhs-ddr50;
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| A D | meson-gxbb-nanopi-k2.dts | 349 sd-uhs-ddr50;
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| A D | meson-gxbb-odroidc2.dts | 366 sd-uhs-ddr50;
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| /linux/include/linux/ |
| A D | rtsx_pci.h | 1294 #define SET_CLOCK_PHASE(sdr104, sdr50, ddr50) \ argument
1295 (((ddr50) << 16) | ((sdr50) << 8) | (sdr104))
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| /linux/arch/arm64/boot/dts/ti/ |
| A D | k3-j721e-main.dtsi | 1070 ti,otap-del-sel-ddr50 = <0xc>;
1075 ti,itap-del-sel-ddr50 = <0x2>;
1096 ti,otap-del-sel-ddr50 = <0xc>;
1101 ti,itap-del-sel-ddr50 = <0x2>;
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| A D | k3-am65-main.dtsi | 269 ti,otap-del-sel-ddr50 = <0x5>;
291 ti,otap-del-sel-ddr50 = <0x4>;
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| /linux/arch/powerpc/boot/dts/ |
| A D | fsp2.dts | 506 sd-uhs-ddr50;
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