| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| A D | display_mode_vba_21.c | 1323 * (dml_ceil( in CalculateVMAndRowBytes()
1505 / dml_ceil( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1670 * dml_ceil( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1804 dml_ceil( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1885 dml_ceil( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2117 dml_ceil( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2644 dml_ceil( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2650 dml_ceil( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3077 * dml_ceil( in CalculateWriteBackDelay()
3092 dml_ceil( in CalculateWriteBackDelay()
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| A D | display_rq_dlg_calc_21.c | 451 + dml_ceil((double) (log2_blk_bytes - 8) / 2.0, 1); in get_meta_and_pte_attr()
687 rq_dlg_param->dpte_groups_per_row_ub = dml_ceil( in get_meta_and_pte_attr()
1763 cur_width_ub = dml_ceil((double) cur_src_width / (double) cur_req_width, 1) in calculate_ttu_cursor()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| A D | display_mode_vba_20.c | 919 * (dml_ceil( in CalculateVMAndRowBytes()
1054 * (dml_ceil( in CalculateVMAndRowBytes()
1066 * (dml_ceil( in CalculateVMAndRowBytes()
1123 / dml_ceil( in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1292 * dml_ceil( in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1814 dml_ceil( in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1916 dml_ceil( in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2030 dml_ceil( in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2070 dml_ceil( in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2640 dml_ceil( in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
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| A D | display_mode_vba_20v2.c | 979 * (dml_ceil( in CalculateVMAndRowBytes()
1114 * (dml_ceil( in CalculateVMAndRowBytes()
1126 * (dml_ceil( in CalculateVMAndRowBytes()
1183 / dml_ceil( in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1352 * dml_ceil( in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1850 dml_ceil( in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1952 dml_ceil( in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2066 dml_ceil( in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2106 dml_ceil( in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2713 dml_ceil( in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
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| A D | display_rq_dlg_calc_20.c | 459 + dml_ceil((double) (log2_blk_bytes - 8) / 2.0, 1); in get_meta_and_pte_attr()
680 rq_dlg_param->dpte_groups_per_row_ub = dml_ceil((double) dpte_row_width_ub / dpte_group_width, in get_meta_and_pte_attr()
1641 cur_width_ub = dml_ceil((double) cur_src_width / (double) cur_req_width, 1) in calculate_ttu_cursor()
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| A D | display_rq_dlg_calc_20v2.c | 459 + dml_ceil((double) (log2_blk_bytes - 8) / 2.0, 1); in get_meta_and_pte_attr()
680 rq_dlg_param->dpte_groups_per_row_ub = dml_ceil((double) dpte_row_width_ub / dpte_group_width, in get_meta_and_pte_attr()
1642 cur_width_ub = dml_ceil((double) cur_src_width / (double) cur_req_width, 1) in calculate_ttu_cursor()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| A D | display_mode_vba_30.c | 1094 Tvm_oto_lines = dml_ceil(4.0 * Tvm_oto / LineTime, 1) / 4.0; in CalculatePrefetchSchedule()
1095 Tr0_oto_lines = dml_ceil(4.0 * Tr0_oto / LineTime, 1) / 4.0; in CalculatePrefetchSchedule()
1374 return VCOSpeed * 4 / dml_ceil(VCOSpeed * 4.0 / Clock, 1); in RoundToDFSGranularityDown()
1714 *MaxNumSwath = dml_ceil(*VInitPreFill / SwathHeight, 1); in CalculatePrefetchSourceLines()
2085 * dml_ceil( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2205 dml_ceil((double) v->HActive[k] / v->NumberOfDSCSlices[k], 1), in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2213 dml_ceil((double) v->HActive[k] / v->NumberOfDSCSlices[k], 1), in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2221 dml_ceil((double) v->HActive[k] / v->NumberOfDSCSlices[k], 1), in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2585 v->VUpdateOffsetPix[k] = dml_ceil(v->HTotal[k] / 4.0, 1); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2592 v->VUpdateOffsetPix[k] = dml_ceil(v->HTotal[x] / 4.0, 1); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
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| A D | display_rq_dlg_calc_30.c | 496 + dml_ceil((double)(log2_blk_bytes - 8) / 2.0, 1); in get_meta_and_pte_attr()
742 rq_dlg_param->dpte_groups_per_row_ub = dml_ceil((double)dpte_row_width_ub / dpte_group_width, in get_meta_and_pte_attr()
931 cur_width_ub = dml_ceil((double)cur_src_width / (double)cur_req_width, 1) in calculate_ttu_cursor()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| A D | display_mode_vba_31.c | 1212 Tvm_oto_lines = dml_ceil(4.0 * Tvm_oto / LineTime, 1) / 4.0;
1213 Tr0_oto_lines = dml_ceil(4.0 * Tr0_oto / LineTime, 1) / 4.0;
1577 return VCOSpeed * 4 / dml_ceil(VCOSpeed * 4.0 / Clock, 1);
1877 *MaxNumSwath = dml_ceil(*VInitPreFill / SwathHeight, 1);
1995 * (dml_ceil(
2001 * (dml_ceil(
2378 dml_ceil((double) v->HActive[k] / v->NumberOfDSCSlices[k], 1),
2666 dml_ceil(
3687 *VUpdateOffsetPix = dml_ceil(HTotal / 4.0, 1);
5058 dml_ceil(
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| A D | display_rq_dlg_calc_31.c | 512 log2_blk_height = log2_blk256_height + dml_ceil((double) (log2_blk_bytes - 8) / 2.0, 1); in get_meta_and_pte_attr()
733 rq_dlg_param->dpte_groups_per_row_ub = dml_ceil((double) dpte_row_width_ub / dpte_group_width, 1); in get_meta_and_pte_attr()
908 …cur_width_ub = dml_ceil((double) cur_src_width / (double) cur_req_width, 1) * (double) cur_req_wid… in calculate_ttu_cursor()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| A D | dml_inline_defs.h | 67 static inline double dml_ceil(double a, double granularity) in dml_ceil() function
80 double ceil = dml_ceil(a, 1); in dml_round()
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| A D | display_mode_vba.c | 914 dml_ceil(WritebackLumaHTaps / 4.0, 1) / WritebackHRatio, in CalculateWriteBackDISPCLK()
915 …dml_max((WritebackLumaVTaps * dml_ceil(1.0 / WritebackVRatio, 1) * dml_ceil(WritebackDestinationWi… in CalculateWriteBackDISPCLK()
916 …+ dml_ceil(WritebackDestinationWidth / 4.0, 1)) / (double) HTotal + dml_ceil(1.0 / WritebackVRatio… in CalculateWriteBackDISPCLK()
917 * (dml_ceil(WritebackLumaVTaps / 4.0, 1) + 4.0) / (double) HTotal, in CalculateWriteBackDISPCLK()
918 dml_ceil(1.0 / WritebackVRatio, 1) * WritebackDestinationWidth / (double) HTotal)); in CalculateWriteBackDISPCLK()
921 dml_ceil(WritebackChromaHTaps / 2.0, 1) / (2 * WritebackHRatio), in CalculateWriteBackDISPCLK()
922 …dml_max((WritebackChromaVTaps * dml_ceil(1 / (2 * WritebackVRatio), 1) * dml_ceil(WritebackDestina… in CalculateWriteBackDISPCLK()
923 + dml_ceil(WritebackDestinationWidth / 2.0 / WritebackChromaLineBufferWidth, 1)) / HTotal in CalculateWriteBackDISPCLK()
924 … + dml_ceil(1 / (2 * WritebackVRatio), 1) * (dml_ceil(WritebackChromaVTaps / 4.0, 1) + 4) / HTotal, in CalculateWriteBackDISPCLK()
925 dml_ceil(1.0 / (2 * WritebackVRatio), 1) * WritebackDestinationWidth / 2.0 / HTotal))); in CalculateWriteBackDISPCLK()
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| A D | dml1_display_rq_dlg_calc.c | 185 …*max_num_sw = (unsigned int) (dml_ceil((prefill - 1.0) / (double) swath_height, 1) + 1.0); /* pref… in get_swath_need()
447 + dml_ceil((double) (log2_blk_bytes - 8) / 2.0, 1); in dml1_rq_dlg_get_row_heights()
687 + dml_ceil((double) (log2_blk_bytes - 8) / 2.0, 1); in get_surf_rq_param()
923 rq_dlg_param->dpte_groups_per_row_ub = dml_ceil( in get_surf_rq_param()
1855 cur0_width_ub = dml_ceil((double) cur0_src_width / (double) cur0_req_width, 1) in dml1_rq_dlg_get_dlg_params()
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