Home
last modified time | relevance | path

Searched refs:dpps (Results 1 – 18 of 18) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dcn201/
A Ddcn201_resource.c938 if (pool->base.dpps[i] != NULL) in dcn201_resource_destruct()
939 dcn201_dpp_destroy(&pool->base.dpps[i]); in dcn201_resource_destruct()
1025 idle_pipe->plane_res.dpp = pool->dpps[idle_pipe->pipe_idx]; in dcn201_acquire_idle_pipe_for_layer()
1026 idle_pipe->plane_res.mpcc_inst = pool->dpps[idle_pipe->pipe_idx]->inst; in dcn201_acquire_idle_pipe_for_layer()
1213 pool->base.dpps[i] = dcn201_dpp_create(ctx, i); in dcn201_resource_construct()
1214 if (pool->base.dpps[i] == NULL) { in dcn201_resource_construct()
A Ddcn201_hwseq.c298 struct dpp *dpp = res_pool->dpps[i]; in dcn201_init_hw()
318 struct dpp *dpp = res_pool->dpps[i]; in dcn201_init_hw()
/linux/drivers/gpu/drm/amd/display/dc/dcn10/
A Ddcn10_resource.c990 if (pool->base.dpps[i] != NULL) in dcn10_resource_destruct()
991 dcn10_dpp_destroy(&pool->base.dpps[i]); in dcn10_resource_destruct()
1174 idle_pipe->plane_res.dpp = pool->dpps[idle_pipe->pipe_idx]; in dcn10_acquire_idle_pipe_for_layer()
1175 idle_pipe->plane_res.mpcc_inst = pool->dpps[idle_pipe->pipe_idx]->inst; in dcn10_acquire_idle_pipe_for_layer()
1592 pool->base.dpps[j] = dcn10_dpp_create(ctx, i); in dcn10_resource_construct()
1593 if (pool->base.dpps[j] == NULL) { in dcn10_resource_construct()
A Ddcn10_hw_sequencer_debug.c342 struct dpp *dpp = pool->dpps[i]; in dcn10_get_cm_states()
A Ddcn10_hw_sequencer.c294 struct dpp *dpp = pool->dpps[i]; in dcn10_log_hw_state()
1313 struct dpp *dpp = dc->res_pool->dpps[i]; in dcn10_init_pipes()
/linux/drivers/gpu/drm/amd/display/dc/dcn302/
A Ddcn302_resource.c1167 if (pool->dpps[i] != NULL) { in dcn302_resource_destruct()
1168 kfree(TO_DCN20_DPP(pool->dpps[i])); in dcn302_resource_destruct()
1169 pool->dpps[i] = NULL; in dcn302_resource_destruct()
1648 pool->dpps[i] = dcn302_dpp_create(ctx, i); in dcn302_resource_construct()
1649 if (pool->dpps[i] == NULL) { in dcn302_resource_construct()
/linux/drivers/gpu/drm/amd/display/dc/dcn303/
A Ddcn303_resource.c1093 if (pool->dpps[i] != NULL) { in dcn303_resource_destruct()
1094 kfree(TO_DCN20_DPP(pool->dpps[i])); in dcn303_resource_destruct()
1095 pool->dpps[i] = NULL; in dcn303_resource_destruct()
1579 pool->dpps[i] = dcn303_dpp_create(ctx, i); in dcn303_resource_construct()
1580 if (pool->dpps[i] == NULL) { in dcn303_resource_construct()
/linux/drivers/gpu/drm/amd/display/dc/core/
A Ddc_resource.c1369 split_pipe->plane_res.dpp = pool->dpps[i]; in acquire_first_split_pipe()
1371 split_pipe->plane_res.mpcc_inst = pool->dpps[i]->inst; in acquire_first_split_pipe()
1759 pipe_ctx->plane_res.dpp = pool->dpps[i]; in acquire_first_free_pipe()
1761 if (pool->dpps[i]) in acquire_first_free_pipe()
1762 pipe_ctx->plane_res.mpcc_inst = pool->dpps[i]->inst; in acquire_first_free_pipe()
2047 pipe_ctx->plane_res.dpp = pool->dpps[tg_inst]; in acquire_resource_from_hw_enabled_state()
2050 if (pool->dpps[tg_inst]) { in acquire_resource_from_hw_enabled_state()
2051 pipe_ctx->plane_res.mpcc_inst = pool->dpps[tg_inst]->inst; in acquire_resource_from_hw_enabled_state()
A Ddc.c1910 if (dc->res_pool->dpps[i]->funcs->dpp_deferred_update) in process_deferred_updates()
1911 dc->res_pool->dpps[i]->funcs->dpp_deferred_update(dc->res_pool->dpps[i]); in process_deferred_updates()
/linux/drivers/gpu/drm/amd/display/dc/dcn301/
A Ddcn301_resource.c1096 if (pool->base.dpps[i] != NULL) in dcn301_destruct()
1097 dcn301_dpp_destroy(&pool->base.dpps[i]); in dcn301_destruct()
1596 pool->base.dpps[j] = dcn301_dpp_create(ctx, i); in dcn301_resource_construct()
1597 if (pool->base.dpps[j] == NULL) { in dcn301_resource_construct()
/linux/drivers/gpu/drm/amd/display/dc/inc/
A Dcore_types.h215 struct dpp *dpps[MAX_PIPES]; member
/linux/drivers/gpu/drm/amd/display/dc/dcn20/
A Ddcn20_resource.c1488 if (pool->base.dpps[i] != NULL) in dcn20_resource_destruct()
1489 dcn20_dpp_destroy(&pool->base.dpps[i]); in dcn20_resource_destruct()
1901 next_odm_pipe->plane_res.dpp = pool->dpps[next_odm_pipe->pipe_idx]; in dcn20_split_stream_for_odm()
1902 next_odm_pipe->plane_res.mpcc_inst = pool->dpps[next_odm_pipe->pipe_idx]->inst; in dcn20_split_stream_for_odm()
1986 secondary_pipe->plane_res.dpp = pool->dpps[secondary_pipe->pipe_idx]; in dcn20_split_stream_for_mpc()
1987 secondary_pipe->plane_res.mpcc_inst = pool->dpps[secondary_pipe->pipe_idx]->inst; in dcn20_split_stream_for_mpc()
3335 idle_pipe->plane_res.dpp = pool->dpps[idle_pipe->pipe_idx]; in dcn20_acquire_idle_pipe_for_layer()
3336 idle_pipe->plane_res.mpcc_inst = pool->dpps[idle_pipe->pipe_idx]->inst; in dcn20_acquire_idle_pipe_for_layer()
3961 pool->base.dpps[i] = dcn20_dpp_create(ctx, i); in dcn20_resource_construct()
3962 if (pool->base.dpps[i] == NULL) { in dcn20_resource_construct()
A Ddcn20_hwseq.c2524 struct dpp *dpp = res_pool->dpps[i]; in dcn20_fpga_init_hw()
2544 struct dpp *dpp = dc->res_pool->dpps[i]; in dcn20_fpga_init_hw()
/linux/drivers/gpu/drm/amd/display/dc/dcn30/
A Ddcn30_resource.c1242 if (pool->base.dpps[i] != NULL) in dcn30_resource_destruct()
1243 dcn30_dpp_destroy(&pool->base.dpps[i]); in dcn30_resource_destruct()
1773 sec_pipe->plane_res.dpp = pool->dpps[pipe_idx]; in dcn30_split_stream_for_mpc_or_odm()
1774 sec_pipe->plane_res.mpcc_inst = pool->dpps[pipe_idx]->inst; in dcn30_split_stream_for_mpc_or_odm()
2764 pool->base.dpps[i] = dcn30_dpp_create(ctx, i); in dcn30_resource_construct()
2765 if (pool->base.dpps[i] == NULL) { in dcn30_resource_construct()
/linux/drivers/gpu/drm/amd/display/dc/dcn21/
A Ddcn21_resource.c944 if (pool->base.dpps[i] != NULL) in dcn21_resource_destruct()
945 dcn20_dpp_destroy(&pool->base.dpps[i]); in dcn21_resource_destruct()
2168 pool->base.dpps[j] = dcn21_dpp_create(ctx, i); in dcn21_resource_construct()
2169 if (pool->base.dpps[j] == NULL) { in dcn21_resource_construct()
/linux/drivers/gpu/drm/amd/display/dc/dcn31/
A Ddcn31_resource.c1564 if (pool->base.dpps[i] != NULL) in dcn31_resource_destruct()
1565 dcn31_dpp_destroy(&pool->base.dpps[i]); in dcn31_resource_destruct()
2361 pool->base.dpps[i] = dcn31_dpp_create(ctx, i); in dcn31_resource_construct()
2362 if (pool->base.dpps[i] == NULL) { in dcn31_resource_construct()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
A Drn_clk_mgr.c113 dpp_inst = clk_mgr->base.ctx->dc->res_pool->dpps[i]->inst; in rn_update_clocks_update_dpp_dto()
/linux/drivers/gpu/drm/amd/display/dc/calcs/
A Ddcn_calcs.c541 secondary_pipe->plane_res.dpp = pool->dpps[secondary_pipe->pipe_idx]; in split_stream_across_pipes()
542 secondary_pipe->plane_res.mpcc_inst = pool->dpps[secondary_pipe->pipe_idx]->inst; in split_stream_across_pipes()

Completed in 90 milliseconds