Searched refs:fixed_clks (Results 1 – 11 of 11) sorted by relevance
| /linux/drivers/clk/mediatek/ |
| A D | clk-mt8516.c | 21 static const struct mtk_fixed_clk fixed_clks[] __initconst = { variable
691 mtk_clk_register_fixed_clks(fixed_clks, ARRAY_SIZE(fixed_clks), in mtk_topckgen_init()
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| A D | clk-mt8167.c | 22 static const struct mtk_fixed_clk fixed_clks[] __initconst = { variable
937 mtk_clk_register_fixed_clks(fixed_clks, ARRAY_SIZE(fixed_clks), in mtk_topckgen_init()
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| A D | clk-mt6765.c | 75 static const struct mtk_fixed_clk fixed_clks[] = { variable
824 mtk_clk_register_fixed_clks(fixed_clks, ARRAY_SIZE(fixed_clks), in clk_mt6765_top_probe()
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| A D | clk-mt8173.c | 26 static const struct mtk_fixed_clk fixed_clks[] __initconst = { variable
851 mtk_clk_register_fixed_clks(fixed_clks, ARRAY_SIZE(fixed_clks), clk_data); in mtk_topckgen_init()
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| /linux/drivers/clk/samsung/ |
| A D | clk.c | 371 if (cmu->fixed_clks) in samsung_cmu_register_one()
372 samsung_clk_register_fixed_rate(ctx, cmu->fixed_clks, in samsung_cmu_register_one()
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| A D | clk.h | 318 const struct samsung_fixed_rate_clock *fixed_clks; member
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| A D | clk-exynos7.c | 966 .fixed_clks = fixed_rate_clks_fsys0,
1095 .fixed_clks = fixed_rate_clks_fsys1,
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| A D | clk-exynos5433.c | 797 .fixed_clks = top_fixed_clks,
2337 .fixed_clks = fsys_fixed_clks,
2886 .fixed_clks = disp_fixed_clks,
3058 .fixed_clks = aud_fixed_clks,
5066 .fixed_clks = cam0_fixed_clks,
5441 .fixed_clks = cam1_fixed_clks,
5624 if (info->fixed_clks) in exynos5433_cmu_probe()
5625 samsung_clk_register_fixed_rate(ctx, info->fixed_clks, in exynos5433_cmu_probe()
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| A D | clk-exynos5260.c | 1827 .fixed_clks = fixed_rate_clks,
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| /linux/ |
| A D | System.map | 73824 ffff8000110d6628 d fixed_clks
126361 ffff800011873a90 d fixed_clks
126424 ffff800011877760 d fixed_clks
126480 ffff8000118796c0 d fixed_clks
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| A D | .tmp_System.map | 73824 ffff8000110d6628 d fixed_clks
126361 ffff800011873a90 d fixed_clks
126424 ffff800011877760 d fixed_clks
126480 ffff8000118796c0 d fixed_clks
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