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Searched refs:gpu_addr (Results 1 – 25 of 128) sorted by relevance

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/linux/drivers/gpu/drm/radeon/
A Dr600_dma.c150 WREG32(DMA_RB_BASE, ring->gpu_addr >> 8); in r600_dma_resume()
236 u64 gpu_addr; in r600_dma_ring_test() local
243 gpu_addr = rdev->wb.gpu_addr + index; in r600_dma_ring_test()
254 radeon_ring_write(ring, lower_32_bits(gpu_addr)); in r600_dma_ring_test()
290 u64 addr = rdev->fence_drv[fence->ring].gpu_addr; in r600_dma_fence_ring_emit()
317 u64 addr = semaphore->gpu_addr; in r600_dma_semaphore_ring_emit()
343 u64 gpu_addr; in r600_dma_ib_test() local
350 gpu_addr = rdev->wb.gpu_addr + index; in r600_dma_ib_test()
359 ib.ptr[1] = lower_32_bits(gpu_addr); in r600_dma_ib_test()
360 ib.ptr[2] = upper_32_bits(gpu_addr) & 0xff; in r600_dma_ib_test()
[all …]
A Dcik_sdma.c155 radeon_ring_write(ring, upper_32_bits(ib->gpu_addr)); in cik_sdma_ring_ib_execute()
203 u64 addr = rdev->fence_drv[fence->ring].gpu_addr; in cik_sdma_fence_ring_emit()
232 u64 addr = semaphore->gpu_addr; in cik_sdma_semaphore_ring_emit()
651 u64 gpu_addr; in cik_sdma_ring_test() local
658 gpu_addr = rdev->wb.gpu_addr + index; in cik_sdma_ring_test()
669 radeon_ring_write(ring, lower_32_bits(gpu_addr)); in cik_sdma_ring_test()
670 radeon_ring_write(ring, upper_32_bits(gpu_addr)); in cik_sdma_ring_test()
708 u64 gpu_addr; in cik_sdma_ib_test() local
715 gpu_addr = rdev->wb.gpu_addr + index; in cik_sdma_ib_test()
727 ib.ptr[1] = lower_32_bits(gpu_addr); in cik_sdma_ib_test()
[all …]
A Duvd_v4_2.c47 addr = (rdev->uvd.gpu_addr + 0x200) >> 3; in uvd_v4_2_resume()
49 addr = rdev->uvd.gpu_addr >> 3; in uvd_v4_2_resume()
67 addr = (rdev->uvd.gpu_addr >> 28) & 0xF; in uvd_v4_2_resume()
71 addr = (rdev->uvd.gpu_addr >> 32) & 0xFF; in uvd_v4_2_resume()
A Duvd_v2_2.c43 uint64_t addr = rdev->fence_drv[fence->ring].gpu_addr; in uvd_v2_2_fence_emit()
77 uint64_t addr = semaphore->gpu_addr; in uvd_v2_2_semaphore_emit()
113 addr = rdev->uvd.gpu_addr >> 3; in uvd_v2_2_resume()
130 addr = (rdev->uvd.gpu_addr >> 28) & 0xF; in uvd_v2_2_resume()
134 addr = (rdev->uvd.gpu_addr >> 32) & 0xFF; in uvd_v2_2_resume()
A Duvd_v1_0.c85 uint64_t addr = rdev->fence_drv[fence->ring].gpu_addr; in uvd_v1_0_fence_emit()
121 addr = (rdev->uvd.gpu_addr >> 3) + 16; in uvd_v1_0_resume()
138 addr = (rdev->uvd.gpu_addr >> 28) & 0xF; in uvd_v1_0_resume()
142 addr = (rdev->uvd.gpu_addr >> 32) & 0xFF; in uvd_v1_0_resume()
364 WREG32(UVD_LMI_EXT40_ADDR, upper_32_bits(ring->gpu_addr) | in uvd_v1_0_start()
374 WREG32(UVD_RBC_RB_BASE, ring->gpu_addr); in uvd_v1_0_start()
487 radeon_ring_write(ring, ib->gpu_addr); in uvd_v1_0_ib_execute()
A Dradeon_semaphore.c51 (*semaphore)->gpu_addr = radeon_sa_bo_gpu_addr((*semaphore)->sa_bo); in radeon_semaphore_create()
69 ring->last_semaphore_signal_addr = semaphore->gpu_addr; in radeon_semaphore_emit_signal()
86 ring->last_semaphore_wait_addr = semaphore->gpu_addr; in radeon_semaphore_emit_wait()
A Dvce_v1_0.c218 uint64_t addr = rdev->vce.gpu_addr; in vce_v1_0_resume()
300 WREG32(VCE_RB_BASE_LO, ring->gpu_addr); in vce_v1_0_start()
301 WREG32(VCE_RB_BASE_HI, upper_32_bits(ring->gpu_addr)); in vce_v1_0_start()
307 WREG32(VCE_RB_BASE_LO2, ring->gpu_addr); in vce_v1_0_start()
308 WREG32(VCE_RB_BASE_HI2, upper_32_bits(ring->gpu_addr)); in vce_v1_0_start()
A Dradeon_trace.h177 __field(uint64_t, gpu_addr)
183 __entry->gpu_addr = sem->gpu_addr;
187 __entry->waiters, __entry->gpu_addr)
A Devergreen_dma.c44 u64 addr = rdev->fence_drv[fence->ring].gpu_addr; in evergreen_dma_fence_ring_emit()
88 radeon_ring_write(ring, (ib->gpu_addr & 0xFFFFFFE0)); in evergreen_dma_ring_ib_execute()
89 radeon_ring_write(ring, (ib->length_dw << 12) | (upper_32_bits(ib->gpu_addr) & 0xFF)); in evergreen_dma_ring_ib_execute()
/linux/drivers/gpu/drm/amd/amdgpu/
A Damdgpu_ih.c69 ih->gpu_addr = dma_addr; in amdgpu_ih_ring_init()
89 &ih->ring_obj, &ih->gpu_addr, in amdgpu_ih_ring_init()
97 ih->wptr_addr = adev->wb.gpu_addr + wptr_offs * 4; in amdgpu_ih_ring_init()
99 ih->rptr_addr = adev->wb.gpu_addr + rptr_offs * 4; in amdgpu_ih_ring_init()
128 (void *)ih->ring, ih->gpu_addr); in amdgpu_ih_ring_fini()
131 amdgpu_bo_free_kernel(&ih->ring_obj, &ih->gpu_addr, in amdgpu_ih_ring_fini()
133 amdgpu_device_wb_free(adev, (ih->wptr_addr - ih->gpu_addr) / 4); in amdgpu_ih_ring_fini()
134 amdgpu_device_wb_free(adev, (ih->rptr_addr - ih->gpu_addr) / 4); in amdgpu_ih_ring_fini()
A Dvcn_v2_0.c339 lower_32_bits(adev->vcn.inst->gpu_addr)); in vcn_v2_0_mc_resume()
898 (upper_32_bits(ring->gpu_addr) >> 2)); in vcn_v2_0_start_dpg_mode()
902 lower_32_bits(ring->gpu_addr)); in vcn_v2_0_start_dpg_mode()
904 upper_32_bits(ring->gpu_addr)); in vcn_v2_0_start_dpg_mode()
1062 lower_32_bits(ring->gpu_addr)); in vcn_v2_0_start()
1064 upper_32_bits(ring->gpu_addr)); in vcn_v2_0_start()
1782 uint64_t addr = table->gpu_addr; in vcn_v2_0_start_mmsch()
1944 lower_32_bits(ring->gpu_addr)); in vcn_v2_0_start_sriov()
1947 upper_32_bits(ring->gpu_addr)); in vcn_v2_0_start_sriov()
1958 lower_32_bits(ring->gpu_addr)); in vcn_v2_0_start_sriov()
[all …]
A Dvce_v4_0.c157 uint64_t addr = table->gpu_addr; in vce_v4_0_mmsch_start()
235 lower_32_bits(ring->gpu_addr)); in vce_v4_0_sriov_start()
237 upper_32_bits(ring->gpu_addr)); in vce_v4_0_sriov_start()
263 adev->vce.gpu_addr >> 8); in vce_v4_0_sriov_start()
266 (adev->vce.gpu_addr >> 40) & 0xff); in vce_v4_0_sriov_start()
273 adev->vce.gpu_addr >> 8); in vce_v4_0_sriov_start()
276 (adev->vce.gpu_addr >> 40) & 0xff); in vce_v4_0_sriov_start()
279 adev->vce.gpu_addr >> 8); in vce_v4_0_sriov_start()
282 (adev->vce.gpu_addr >> 40) & 0xff); in vce_v4_0_sriov_start()
662 (adev->vce.gpu_addr >> 8)); in vce_v4_0_mc_resume()
[all …]
A Dvcn_v2_5.c399 lower_32_bits(adev->vcn.inst[i].gpu_addr)); in vcn_v2_5_mc_resume()
877 (upper_32_bits(ring->gpu_addr) >> 2)); in vcn_v2_5_start_dpg_mode()
881 lower_32_bits(ring->gpu_addr)); in vcn_v2_5_start_dpg_mode()
883 upper_32_bits(ring->gpu_addr)); in vcn_v2_5_start_dpg_mode()
1061 lower_32_bits(ring->gpu_addr)); in vcn_v2_5_start()
1063 upper_32_bits(ring->gpu_addr)); in vcn_v2_5_start()
1099 uint64_t addr = table->gpu_addr; in vcn_v2_5_mmsch_start()
1249 lower_32_bits(ring->gpu_addr)); in vcn_v2_5_sriov_start()
1252 upper_32_bits(ring->gpu_addr)); in vcn_v2_5_sriov_start()
1262 lower_32_bits(ring->gpu_addr)); in vcn_v2_5_sriov_start()
[all …]
A Dvcn_v1_0.c309 lower_32_bits(adev->vcn.inst->gpu_addr)); in vcn_v1_0_mc_resume_spg_mode()
311 upper_32_bits(adev->vcn.inst->gpu_addr)); in vcn_v1_0_mc_resume_spg_mode()
913 (upper_32_bits(ring->gpu_addr) >> 2)); in vcn_v1_0_start_spg_mode()
917 lower_32_bits(ring->gpu_addr)); in vcn_v1_0_start_spg_mode()
919 upper_32_bits(ring->gpu_addr)); in vcn_v1_0_start_spg_mode()
1071 (upper_32_bits(ring->gpu_addr) >> 2)); in vcn_v1_0_start_dpg_mode()
1075 lower_32_bits(ring->gpu_addr)); in vcn_v1_0_start_dpg_mode()
1077 upper_32_bits(ring->gpu_addr)); in vcn_v1_0_start_dpg_mode()
1307 lower_32_bits(ring->gpu_addr)); in vcn_v1_0_pause_dpg_mode()
1309 upper_32_bits(ring->gpu_addr)); in vcn_v1_0_pause_dpg_mode()
[all …]
A Dsi_dma.c75 amdgpu_ring_write(ring, (ib->gpu_addr & 0xFFFFFFE0)); in si_dma_ring_emit_ib()
157 rptr_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4); in si_dma_start()
210 u64 gpu_addr; in si_dma_ring_test_ring() local
216 gpu_addr = adev->wb.gpu_addr + (index * 4); in si_dma_ring_test_ring()
225 amdgpu_ring_write(ring, lower_32_bits(gpu_addr)); in si_dma_ring_test_ring()
226 amdgpu_ring_write(ring, upper_32_bits(gpu_addr) & 0xff); in si_dma_ring_test_ring()
261 u64 gpu_addr; in si_dma_ring_test_ib() local
268 gpu_addr = adev->wb.gpu_addr + (index * 4); in si_dma_ring_test_ib()
278 ib.ptr[1] = lower_32_bits(gpu_addr); in si_dma_ring_test_ib()
279 ib.ptr[2] = upper_32_bits(gpu_addr) & 0xff; in si_dma_ring_test_ib()
[all …]
A Dsdma_v2_4.c265 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0); in sdma_v2_4_ring_emit_ib()
266 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr)); in sdma_v2_4_ring_emit_ib()
556 u64 gpu_addr; in sdma_v2_4_ring_test_ring() local
562 gpu_addr = adev->wb.gpu_addr + (index * 4); in sdma_v2_4_ring_test_ring()
572 amdgpu_ring_write(ring, lower_32_bits(gpu_addr)); in sdma_v2_4_ring_test_ring()
573 amdgpu_ring_write(ring, upper_32_bits(gpu_addr)); in sdma_v2_4_ring_test_ring()
609 u64 gpu_addr; in sdma_v2_4_ring_test_ib() local
616 gpu_addr = adev->wb.gpu_addr + (index * 4); in sdma_v2_4_ring_test_ib()
627 ib.ptr[1] = lower_32_bits(gpu_addr); in sdma_v2_4_ring_test_ib()
628 ib.ptr[2] = upper_32_bits(gpu_addr); in sdma_v2_4_ring_test_ib()
[all …]
A Dvcn_v3_0.c445 lower_32_bits(adev->vcn.inst[inst].gpu_addr)); in vcn_v3_0_mc_resume()
1047 (upper_32_bits(ring->gpu_addr) >> 2)); in vcn_v3_0_start_dpg_mode()
1051 lower_32_bits(ring->gpu_addr)); in vcn_v3_0_start_dpg_mode()
1053 upper_32_bits(ring->gpu_addr)); in vcn_v3_0_start_dpg_mode()
1228 lower_32_bits(ring->gpu_addr)); in vcn_v3_0_start()
1230 upper_32_bits(ring->gpu_addr)); in vcn_v3_0_start()
1332 lower_32_bits(adev->vcn.inst[i].gpu_addr)); in vcn_v3_0_start_sriov()
1335 upper_32_bits(adev->vcn.inst[i].gpu_addr)); in vcn_v3_0_start_sriov()
1378 rb_addr = ring->gpu_addr; in vcn_v3_0_start_sriov()
1392 rb_addr = ring->gpu_addr; in vcn_v3_0_start_sriov()
[all …]
A Duvd_v7_0.c689 lower_32_bits(adev->uvd.inst[i].gpu_addr)); in uvd_v7_0_mc_resume()
691 upper_32_bits(adev->uvd.inst[i].gpu_addr)); in uvd_v7_0_mc_resume()
729 uint64_t addr = table->gpu_addr; in uvd_v7_0_mmsch_start()
831 lower_32_bits(adev->uvd.inst[i].gpu_addr)); in uvd_v7_0_sriov_start()
833 upper_32_bits(adev->uvd.inst[i].gpu_addr)); in uvd_v7_0_sriov_start()
1092 (upper_32_bits(ring->gpu_addr) >> 2)); in uvd_v7_0_start()
1096 lower_32_bits(ring->gpu_addr)); in uvd_v7_0_start()
1098 upper_32_bits(ring->gpu_addr)); in uvd_v7_0_start()
1327 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr)); in uvd_v7_0_ring_emit_ib()
1330 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr)); in uvd_v7_0_ring_emit_ib()
[all …]
A Dcik_sdma.c237 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xffffffff); in cik_sdma_ring_emit_ib()
482 ((adev->wb.gpu_addr + wb_offset) & 0xFFFFFFFC)); in cik_sdma_gfx_resume()
622 u64 gpu_addr; in cik_sdma_ring_test_ring() local
628 gpu_addr = adev->wb.gpu_addr + (index * 4); in cik_sdma_ring_test_ring()
637 amdgpu_ring_write(ring, lower_32_bits(gpu_addr)); in cik_sdma_ring_test_ring()
638 amdgpu_ring_write(ring, upper_32_bits(gpu_addr)); in cik_sdma_ring_test_ring()
674 u64 gpu_addr; in cik_sdma_ring_test_ib() local
681 gpu_addr = adev->wb.gpu_addr + (index * 4); in cik_sdma_ring_test_ib()
692 ib.ptr[1] = lower_32_bits(gpu_addr); in cik_sdma_ring_test_ib()
693 ib.ptr[2] = upper_32_bits(gpu_addr); in cik_sdma_ring_test_ib()
[all …]
A Dvce_v3_0.c283 WREG32(mmVCE_RB_BASE_LO, ring->gpu_addr); in vce_v3_0_start()
284 WREG32(mmVCE_RB_BASE_HI, upper_32_bits(ring->gpu_addr)); in vce_v3_0_start()
290 WREG32(mmVCE_RB_BASE_LO2, ring->gpu_addr); in vce_v3_0_start()
291 WREG32(mmVCE_RB_BASE_HI2, upper_32_bits(ring->gpu_addr)); in vce_v3_0_start()
297 WREG32(mmVCE_RB_BASE_LO3, ring->gpu_addr); in vce_v3_0_start()
298 WREG32(mmVCE_RB_BASE_HI3, upper_32_bits(ring->gpu_addr)); in vce_v3_0_start()
569 WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR0, (adev->vce.gpu_addr >> 8)); in vce_v3_0_mc_resume()
573 WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR, (adev->vce.gpu_addr >> 8)); in vce_v3_0_mc_resume()
871 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr)); in vce_v3_0_ring_emit_ib()
872 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr)); in vce_v3_0_ring_emit_ib()
[all …]
A Dsdma_v3_0.c440 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr)); in sdma_v3_0_ring_emit_ib()
718 wptr_gpu_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); in sdma_v3_0_gfx_resume()
828 u64 gpu_addr; in sdma_v3_0_ring_test_ring() local
834 gpu_addr = adev->wb.gpu_addr + (index * 4); in sdma_v3_0_ring_test_ring()
844 amdgpu_ring_write(ring, lower_32_bits(gpu_addr)); in sdma_v3_0_ring_test_ring()
845 amdgpu_ring_write(ring, upper_32_bits(gpu_addr)); in sdma_v3_0_ring_test_ring()
881 u64 gpu_addr; in sdma_v3_0_ring_test_ib() local
888 gpu_addr = adev->wb.gpu_addr + (index * 4); in sdma_v3_0_ring_test_ib()
899 ib.ptr[1] = lower_32_bits(gpu_addr); in sdma_v3_0_ring_test_ib()
900 ib.ptr[2] = upper_32_bits(gpu_addr); in sdma_v3_0_ring_test_ib()
[all …]
A Djpeg_v1_0.c62 val = lower_32_bits(ring->gpu_addr); in jpeg_v1_0_decode_ring_set_patch_ring()
68 val = upper_32_bits(ring->gpu_addr); in jpeg_v1_0_decode_ring_set_patch_ring()
311 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr)); in jpeg_v1_0_decode_ring_emit_ib()
315 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr)); in jpeg_v1_0_decode_ring_emit_ib()
323 amdgpu_ring_write(ring, lower_32_bits(ring->gpu_addr)); in jpeg_v1_0_decode_ring_emit_ib()
327 amdgpu_ring_write(ring, upper_32_bits(ring->gpu_addr)); in jpeg_v1_0_decode_ring_emit_ib()
530 WREG32_SOC15(JPEG, 0, mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW, lower_32_bits(ring->gpu_addr)); in jpeg_v1_0_start()
531 WREG32_SOC15(JPEG, 0, mmUVD_LMI_JRBC_RB_64BIT_BAR_HIGH, upper_32_bits(ring->gpu_addr)); in jpeg_v1_0_start()
A Damdgpu_fence.c177 amdgpu_ring_emit_fence(ring, ring->fence_drv.gpu_addr, in amdgpu_fence_emit()
233 amdgpu_ring_emit_fence(ring, ring->fence_drv.gpu_addr, in amdgpu_fence_emit_polling()
426 ring->fence_drv.gpu_addr = adev->wb.gpu_addr + (ring->fence_offs * 4); in amdgpu_fence_driver_start_ring()
431 ring->fence_drv.gpu_addr = adev->uvd.inst[ring->me].gpu_addr + index; in amdgpu_fence_driver_start_ring()
440 ring->name, ring->fence_drv.gpu_addr); in amdgpu_fence_driver_start_ring()
470 ring->fence_drv.gpu_addr = 0; in amdgpu_fence_driver_init_ring()
A Dsdma_v5_2.c361 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr)); in sdma_v5_2_ring_emit_ib()
633 wptr_gpu_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); in sdma_v5_2_gfx_resume()
910 u64 gpu_addr; in sdma_v5_2_ring_test_ring() local
918 gpu_addr = adev->wb.gpu_addr + (index * 4); in sdma_v5_2_ring_test_ring()
931 amdgpu_ring_write(ring, lower_32_bits(gpu_addr)); in sdma_v5_2_ring_test_ring()
932 amdgpu_ring_write(ring, upper_32_bits(gpu_addr)); in sdma_v5_2_ring_test_ring()
972 u64 gpu_addr; in sdma_v5_2_ring_test_ib() local
980 gpu_addr = adev->wb.gpu_addr + (index * 4); in sdma_v5_2_ring_test_ib()
992 ib.ptr[1] = lower_32_bits(gpu_addr); in sdma_v5_2_ring_test_ib()
993 ib.ptr[2] = upper_32_bits(gpu_addr); in sdma_v5_2_ring_test_ib()
[all …]
/linux/drivers/gpu/drm/amd/amdkfd/
A Dkfd_mqd_manager.c57 mqd_mem_obj->gpu_addr = dev->dqm->hiq_sdma_mqd.gpu_addr; in allocate_hiq_mqd()
82 mqd_mem_obj->gpu_addr = dev->dqm->hiq_sdma_mqd.gpu_addr + offset; in allocate_sdma_mqd()

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