| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | soc15.h | 37 u32 hwip; member
46 u32 hwip; member
53 uint32_t hwip; member
60 uint32_t hwip; member
70 uint32_t hwip; member
79 uint32_t hwip; member
91 #define SOC15_REG_ENTRY_OFFSET(entry) (adev->reg_offset[entry.hwip][entry.inst][entry.seg] + entry.…
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| A D | soc15_common.h | 30 #define __WREG32_SOC15_RLC__(reg, value, flag, hwip) \ argument
32 adev->gfx.rlc.funcs->sriov_wreg(adev, reg, value, flag, hwip) : \
35 #define __RREG32_SOC15_RLC__(reg, flag, hwip) \ argument
37 adev->gfx.rlc.funcs->sriov_rreg(adev, reg, flag, hwip) : \
137 #define WREG32_RLC_NO_KIQ(reg, value, hwip) \ argument
138 __WREG32_SOC15_RLC__(reg, value, AMDGPU_REGS_NO_KIQ | AMDGPU_REGS_RLC, hwip)
140 #define RREG32_RLC_NO_KIQ(reg, hwip) \ argument
141 __RREG32_SOC15_RLC__(reg, AMDGPU_REGS_NO_KIQ | AMDGPU_REGS_RLC, hwip)
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| A D | amdgpu_rlc.h | 130 void (*sriov_wreg)(struct amdgpu_device *adev, u32 offset, u32 v, u32 acc_flags, u32 hwip);
131 u32 (*sriov_rreg)(struct amdgpu_device *adev, u32 offset, u32 acc_flags, u32 hwip);
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| A D | amdgpu_ctx.h | 91 ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip,
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| A D | soc15.c | 475 if (adev->reg_offset[en->hwip][en->inst] && in soc15_read_register()
476 reg_offset != (adev->reg_offset[en->hwip][en->inst][en->seg] in soc15_read_register()
510 reg = adev->reg_offset[entry->hwip][entry->instance][entry->segment] + entry->reg; in soc15_program_register_sequence()
515 tmp = (entry->hwip == GC_HWIP) ? in soc15_program_register_sequence()
528 (entry->hwip == GC_HWIP) ? in soc15_program_register_sequence()
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| A D | amdgpu_ctx.c | 780 ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip, in amdgpu_ctx_mgr_fence_usage() argument
796 if (!ctx->entities[hwip][idx]) in amdgpu_ctx_mgr_fence_usage()
799 centity = ctx->entities[hwip][idx]; in amdgpu_ctx_mgr_fence_usage()
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| A D | nv.c | 458 (adev->reg_offset[en->hwip][en->inst][en->seg] + en->reg_offset)) in nv_read_register()
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| A D | gfx_v10_0.c | 1466 static bool gfx_v10_get_rlcg_flag(struct amdgpu_device *adev, u32 acc_flags, u32 hwip, in gfx_v10_get_rlcg_flag() argument
1469 switch (hwip) { in gfx_v10_get_rlcg_flag()
1573 …void gfx_v10_sriov_wreg(struct amdgpu_device *adev, u32 offset, u32 value, u32 acc_flags, u32 hwip) in gfx_v10_sriov_wreg() argument
1578 gfx_v10_get_rlcg_flag(adev, acc_flags, hwip, 1, &rlcg_flag)) { in gfx_v10_sriov_wreg()
1589 static u32 gfx_v10_sriov_rreg(struct amdgpu_device *adev, u32 offset, u32 acc_flags, u32 hwip) in gfx_v10_sriov_rreg() argument
1594 gfx_v10_get_rlcg_flag(adev, acc_flags, hwip, 0, &rlcg_flag)) in gfx_v10_sriov_rreg()
8298 reg = adev->reg_offset[entry->hwip][entry->instance][entry->segment] + entry->reg; in gfx_v10_0_check_rlcg_range()
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| A D | gfx_v9_0.c | 796 u32 v, u32 acc_flags, u32 hwip) in gfx_v9_0_sriov_wreg() argument
5165 reg = adev->reg_offset[entry->hwip][entry->instance][entry->segment] + entry->reg; in gfx_v9_0_check_rlcg_range()
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| /linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| A D | common_baco.h | 47 uint32_t hwip; member
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| A D | common_baco.c | 112 reg = adev->reg_offset[entry[i].hwip][entry[i].inst][entry[i].seg] in soc15_baco_program_registers()
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