| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/acr/ |
| A D | lsfw.c | 50 list_for_each_entry(lsfw, &acr->lsfw, head) { in nvkm_acr_lsfw_get()
67 if (lsfw && lsfw->func) { in nvkm_acr_lsfw_add()
73 if (!(lsfw = kzalloc(sizeof(*lsfw), GFP_KERNEL))) in nvkm_acr_lsfw_add()
77 list_add_tail(&lsfw->head, &acr->lsfw); in nvkm_acr_lsfw_add()
135 lsfw->data_size = lsfw->app_size + lsfw->bootloader_size - in nvkm_acr_lsfw_from_desc()
220 lsfw->app_start_offset = lsfw->bootloader_size; in nvkm_acr_lsfw_load_bl_inst_data_sig()
226 lsfw->app_size = lsfw->app_resident_code_size + in nvkm_acr_lsfw_load_bl_inst_data_sig()
229 lsfw->img.size = lsfw->bootloader_size + lsfw->app_size; in nvkm_acr_lsfw_load_bl_inst_data_sig()
236 memcpy(lsfw->img.data + lsfw->app_start_offset + in nvkm_acr_lsfw_load_bl_inst_data_sig()
238 memcpy(lsfw->img.data + lsfw->app_start_offset + in nvkm_acr_lsfw_load_bl_inst_data_sig()
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| A D | gp102.c | 44 list_for_each_entry(lsfw, &acr->lsfw, head) { in gp102_acr_wpr_patch()
67 memcpy(&hdr.signature, lsfw->sig->data, lsfw->sig->size); in gp102_acr_wpr_build_lsb()
82 list_for_each_entry(lsfw, &acr->lsfw, head) { in gp102_acr_wpr_build()
85 .falcon_id = lsfw->id, in gp102_acr_wpr_build()
104 lsfw->img.data, in gp102_acr_wpr_build()
105 lsfw->img.size); in gp102_acr_wpr_build()
108 lsfw->func->bld_write(acr, lsfw->offset.bld, lsfw); in gp102_acr_wpr_build()
142 list_for_each_entry(lsfw, &acr->lsfw, head) { in gp102_acr_wpr_layout()
149 wpr += lsfw->img.size; in gp102_acr_wpr_layout()
153 lsfw->bl_data_size = ALIGN(lsfw->func->bld_size, 256); in gp102_acr_wpr_layout()
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| A D | gm200.c | 77 list_for_each_entry(lsfw, &acr->lsfw, head) { in gm200_acr_wpr_patch()
119 memcpy(&hdr.signature, lsfw->sig->data, lsfw->sig->size); in gm200_acr_wpr_build_lsb()
134 list_for_each_entry(lsfw, &acr->lsfw, head) { in gm200_acr_wpr_build()
154 lsfw->img.data, in gm200_acr_wpr_build()
155 lsfw->img.size); in gm200_acr_wpr_build()
158 lsfw->func->bld_write(acr, lsfw->offset.bld, lsfw); in gm200_acr_wpr_build()
188 list_for_each_entry(lsfw, &acr->lsfw, head) { in gm200_acr_wpr_layout()
195 wpr += lsfw->img.size; in gm200_acr_wpr_layout()
199 lsfw->bl_data_size = ALIGN(lsfw->func->bld_size, 256); in gm200_acr_wpr_layout()
215 if (IS_ERR(lsfw)) in gm200_acr_wpr_parse()
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| A D | tu102.c | 45 struct nvkm_acr_lsfw *lsfw; in tu102_acr_wpr_build() local
53 list_for_each_entry(lsfw, &acr->lsfw, head) { in tu102_acr_wpr_build()
54 struct lsf_signature_v1 *sig = (void *)lsfw->sig->data; in tu102_acr_wpr_build()
56 .falcon_id = lsfw->id, in tu102_acr_wpr_build()
57 .lsb_offset = lsfw->offset.lsb, in tu102_acr_wpr_build()
69 ret = gp102_acr_wpr_build_lsb(acr, lsfw); in tu102_acr_wpr_build()
74 nvkm_wobj(acr->wpr, lsfw->offset.img, in tu102_acr_wpr_build()
75 lsfw->img.data, in tu102_acr_wpr_build()
76 lsfw->img.size); in tu102_acr_wpr_build()
79 lsfw->func->bld_write(acr, lsfw->offset.bld, lsfw); in tu102_acr_wpr_build()
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| A D | base.c | 220 struct nvkm_acr_lsfw *lsfw, *lsft; in nvkm_acr_oneinit() local
235 list_for_each_entry_safe(lsfw, lsft, &acr->lsfw, head) { in nvkm_acr_oneinit()
238 if (!lsfw->func) { in nvkm_acr_oneinit()
239 nvkm_acr_lsfw_del(lsfw); in nvkm_acr_oneinit()
255 lsf->func = lsfw->func; in nvkm_acr_oneinit()
256 lsf->falcon = lsfw->falcon; in nvkm_acr_oneinit()
257 lsf->id = lsfw->id; in nvkm_acr_oneinit()
274 list_for_each_entry_safe(lsfw, lsft, &acr->lsfw, head) { in nvkm_acr_oneinit()
277 nvkm_acr_lsf_id(lsfw->id)); in nvkm_acr_oneinit()
278 nvkm_acr_lsfw_del(lsfw); in nvkm_acr_oneinit()
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| A D | Kbuild | 4 nvkm-y += nvkm/subdev/acr/lsfw.o
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| /linux/drivers/gpu/drm/nouveau/nvkm/engine/sec2/ |
| A D | gp102.c | 101 struct nvkm_acr_lsfw *lsfw) in gp102_sec2_acr_bld_write() argument
105 .code_dma_base = lsfw->offset.img + lsfw->app_start_offset, in gp102_sec2_acr_bld_write()
106 .code_size_total = lsfw->app_size, in gp102_sec2_acr_bld_write()
109 .data_dma_base = lsfw->offset.img + lsfw->app_start_offset + in gp102_sec2_acr_bld_write()
110 lsfw->app_resident_data_offset, in gp102_sec2_acr_bld_write()
112 .overlay_dma_base = lsfw->offset.img + lsfw->app_start_offset, in gp102_sec2_acr_bld_write()
114 .argv = lsfw->falcon->func->emem_addr, in gp102_sec2_acr_bld_write()
284 struct nvkm_acr_lsfw *lsfw) in gp102_sec2_acr_bld_write_1() argument
288 .code_dma_base = lsfw->offset.img + lsfw->app_start_offset, in gp102_sec2_acr_bld_write_1()
292 .data_dma_base = lsfw->offset.img + lsfw->app_start_offset + in gp102_sec2_acr_bld_write_1()
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| /linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/ |
| A D | gp108.c | 41 struct nvkm_acr_lsfw *lsfw) in gp108_gr_acr_bld_write() argument
43 const u64 base = lsfw->offset.img + lsfw->app_start_offset; in gp108_gr_acr_bld_write()
44 const u64 code = base + lsfw->app_resident_code_offset; in gp108_gr_acr_bld_write()
45 const u64 data = base + lsfw->app_resident_data_offset; in gp108_gr_acr_bld_write()
49 .non_sec_code_off = lsfw->app_resident_code_offset, in gp108_gr_acr_bld_write()
50 .non_sec_code_size = lsfw->app_resident_code_size, in gp108_gr_acr_bld_write()
51 .code_entry_point = lsfw->app_imem_entry, in gp108_gr_acr_bld_write()
53 .data_size = lsfw->app_resident_data_size, in gp108_gr_acr_bld_write()
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| A D | gm20b.c | 53 struct nvkm_acr_lsfw *lsfw) in gm20b_gr_acr_bld_write() argument
55 const u64 base = lsfw->offset.img + lsfw->app_start_offset; in gm20b_gr_acr_bld_write()
56 const u64 code = (base + lsfw->app_resident_code_offset) >> 8; in gm20b_gr_acr_bld_write()
57 const u64 data = (base + lsfw->app_resident_data_offset) >> 8; in gm20b_gr_acr_bld_write()
61 .non_sec_code_off = lsfw->app_resident_code_offset, in gm20b_gr_acr_bld_write()
62 .non_sec_code_size = lsfw->app_resident_code_size, in gm20b_gr_acr_bld_write()
63 .code_entry_point = lsfw->app_imem_entry, in gm20b_gr_acr_bld_write()
65 .data_size = lsfw->app_resident_data_size, in gm20b_gr_acr_bld_write()
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| A D | gm200.c | 59 struct nvkm_acr_lsfw *lsfw) in gm200_gr_acr_bld_write() argument
61 const u64 base = lsfw->offset.img + lsfw->app_start_offset; in gm200_gr_acr_bld_write()
62 const u64 code = base + lsfw->app_resident_code_offset; in gm200_gr_acr_bld_write()
63 const u64 data = base + lsfw->app_resident_data_offset; in gm200_gr_acr_bld_write()
67 .non_sec_code_off = lsfw->app_resident_code_offset, in gm200_gr_acr_bld_write()
68 .non_sec_code_size = lsfw->app_resident_code_size, in gm200_gr_acr_bld_write()
69 .code_entry_point = lsfw->app_imem_entry, in gm200_gr_acr_bld_write()
71 .data_size = lsfw->app_resident_data_size, in gm200_gr_acr_bld_write()
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| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/ |
| A D | gm20b.c | 98 struct nvkm_acr_lsfw *lsfw) in gm20b_pmu_acr_bld_write() argument
100 const u64 base = lsfw->offset.img + lsfw->app_start_offset; in gm20b_pmu_acr_bld_write()
101 const u64 code = (base + lsfw->app_resident_code_offset) >> 8; in gm20b_pmu_acr_bld_write()
102 const u64 data = (base + lsfw->app_resident_data_offset) >> 8; in gm20b_pmu_acr_bld_write()
106 .code_size_total = lsfw->app_size, in gm20b_pmu_acr_bld_write()
107 .code_size_to_load = lsfw->app_resident_code_size, in gm20b_pmu_acr_bld_write()
108 .code_entry_point = lsfw->app_imem_entry, in gm20b_pmu_acr_bld_write()
110 .data_size = lsfw->app_resident_data_size, in gm20b_pmu_acr_bld_write()
113 .argv = lsfw->falcon->data.limit - sizeof(struct nv_pmu_args), in gm20b_pmu_acr_bld_write()
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| /linux/drivers/gpu/drm/nouveau/include/nvkm/subdev/ |
| A D | acr.h | 40 struct list_head lsfw, lsf; member
|