Searched refs:mmVM_CONTEXT1_CNTL (Results 1 – 16 of 16) sorted by relevance
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | gmc_v6_0.c | 398 tmp = RREG32(mmVM_CONTEXT1_CNTL); in gmc_v6_0_set_fault_enable_default()
411 WREG32(mmVM_CONTEXT1_CNTL, tmp); in gmc_v6_0_set_fault_enable_default()
547 WREG32(mmVM_CONTEXT1_CNTL, in gmc_v6_0_gart_enable()
596 WREG32(mmVM_CONTEXT1_CNTL, 0); in gmc_v6_0_gart_disable()
1051 tmp = RREG32(mmVM_CONTEXT1_CNTL); in gmc_v6_0_vm_fault_interrupt_state()
1053 WREG32(mmVM_CONTEXT1_CNTL, tmp); in gmc_v6_0_vm_fault_interrupt_state()
1059 tmp = RREG32(mmVM_CONTEXT1_CNTL); in gmc_v6_0_vm_fault_interrupt_state()
1061 WREG32(mmVM_CONTEXT1_CNTL, tmp); in gmc_v6_0_vm_fault_interrupt_state()
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| A D | gmc_v7_0.c | 529 tmp = RREG32(mmVM_CONTEXT1_CNTL); in gmc_v7_0_set_fault_enable_default()
542 WREG32(mmVM_CONTEXT1_CNTL, tmp); in gmc_v7_0_set_fault_enable_default()
694 tmp = RREG32(mmVM_CONTEXT1_CNTL); in gmc_v7_0_gart_enable()
699 WREG32(mmVM_CONTEXT1_CNTL, tmp); in gmc_v7_0_gart_enable()
749 WREG32(mmVM_CONTEXT1_CNTL, 0); in gmc_v7_0_gart_disable()
1250 tmp = RREG32(mmVM_CONTEXT1_CNTL); in gmc_v7_0_vm_fault_interrupt_state()
1252 WREG32(mmVM_CONTEXT1_CNTL, tmp); in gmc_v7_0_vm_fault_interrupt_state()
1260 tmp = RREG32(mmVM_CONTEXT1_CNTL); in gmc_v7_0_vm_fault_interrupt_state()
1262 WREG32(mmVM_CONTEXT1_CNTL, tmp); in gmc_v7_0_vm_fault_interrupt_state()
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| A D | gmc_v8_0.c | 744 tmp = RREG32(mmVM_CONTEXT1_CNTL); in gmc_v8_0_set_fault_enable_default()
759 WREG32(mmVM_CONTEXT1_CNTL, tmp); in gmc_v8_0_set_fault_enable_default()
927 tmp = RREG32(mmVM_CONTEXT1_CNTL); in gmc_v8_0_gart_enable()
939 WREG32(mmVM_CONTEXT1_CNTL, tmp); in gmc_v8_0_gart_enable()
983 WREG32(mmVM_CONTEXT1_CNTL, 0); in gmc_v8_0_gart_disable()
1412 tmp = RREG32(mmVM_CONTEXT1_CNTL); in gmc_v8_0_vm_fault_interrupt_state()
1414 WREG32(mmVM_CONTEXT1_CNTL, tmp); in gmc_v8_0_vm_fault_interrupt_state()
1422 tmp = RREG32(mmVM_CONTEXT1_CNTL); in gmc_v8_0_vm_fault_interrupt_state()
1424 WREG32(mmVM_CONTEXT1_CNTL, tmp); in gmc_v8_0_vm_fault_interrupt_state()
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| A D | gfxhub_v1_0.c | 263 tmp = RREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT1_CNTL, i); in gfxhub_v1_0_setup_vmid_config()
293 WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config()
435 hub->ctx_distance = mmVM_CONTEXT1_CNTL - mmVM_CONTEXT0_CNTL; in gfxhub_v1_0_init()
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| A D | mmhub_v1_0.c | 244 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT1_CNTL, i); in mmhub_v1_0_setup_vmid_config()
270 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT1_CNTL, in mmhub_v1_0_setup_vmid_config()
438 hub->ctx_distance = mmVM_CONTEXT1_CNTL - mmVM_CONTEXT0_CNTL; in mmhub_v1_0_init()
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gmc/ |
| A D | gmc_7_0_d.h | 546 #define mmVM_CONTEXT1_CNTL 0x505 macro
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| A D | gmc_8_2_d.h | 604 #define mmVM_CONTEXT1_CNTL 0x505 macro
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| A D | gmc_6_0_d.h | 1231 #define mmVM_CONTEXT1_CNTL 0x0505 macro
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| A D | gmc_7_1_d.h | 579 #define mmVM_CONTEXT1_CNTL 0x505 macro
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| A D | gmc_8_1_d.h | 602 #define mmVM_CONTEXT1_CNTL 0x505 macro
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| /linux/drivers/gpu/drm/amd/include/asic_reg/mmhub/ |
| A D | mmhub_9_1_offset.h | 1358 #define mmVM_CONTEXT1_CNTL … macro
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| A D | mmhub_9_3_0_offset.h | 1342 #define mmVM_CONTEXT1_CNTL … macro
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| A D | mmhub_1_0_offset.h | 1326 #define mmVM_CONTEXT1_CNTL … macro
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| A D | gc_9_0_offset.h | 1234 #define mmVM_CONTEXT1_CNTL … macro
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| A D | gc_9_1_offset.h | 1253 #define mmVM_CONTEXT1_CNTL … macro
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| A D | gc_9_2_1_offset.h | 1191 #define mmVM_CONTEXT1_CNTL … macro
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