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Searched refs:mr_cache (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/net/ethernet/mellanox/mlx5/core/
A Dmain.c113 .mr_cache[0] = {
117 .mr_cache[1] = {
121 .mr_cache[2] = {
125 .mr_cache[3] = {
129 .mr_cache[4] = {
133 .mr_cache[5] = {
137 .mr_cache[6] = {
141 .mr_cache[7] = {
145 .mr_cache[8] = {
149 .mr_cache[9] = {
[all …]
/linux/include/linux/mlx5/
A Ddriver.h714 } mr_cache[MAX_MR_CACHE_ENTRIES]; member
/linux/drivers/infiniband/hw/mlx5/
A Dmr.c747 ent->limit = dev->mdev->profile.mr_cache[i].limit; in mlx5_mr_cache_init()

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