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Searched refs:mux_shift (Results 1 – 22 of 22) sorted by relevance

/linux/drivers/clk/rockchip/
A Dclk-ddr.c19 int mux_shift; member
77 ddrclk->mux_offset) >> ddrclk->mux_shift; in rockchip_ddrclk_get_parent()
93 int mux_shift, int mux_width, in rockchip_clk_register_ddrclk() argument
127 ddrclk->mux_shift = mux_shift; in rockchip_clk_register_ddrclk()
A Dclk.h407 int mux_shift, int mux_width,
448 u8 mux_shift; member
472 .mux_shift = ms, \
493 .mux_shift = ms, \
552 .mux_shift = ms, \
570 .mux_shift = ms, \
589 .mux_shift = ms, \
677 .mux_shift = s, \
692 .mux_shift = s, \
801 .mux_shift = ms, \
[all …]
A Dclk.c42 int muxdiv_offset, u8 mux_shift, u8 mux_width, u8 mux_flags, in rockchip_clk_register_branch() argument
62 mux->shift = mux_shift; in rockchip_clk_register_branch()
267 frac_mux->shift = child->mux_shift; in rockchip_clk_register_frac_branch()
447 list->mux_shift, list->mux_width, in rockchip_clk_register_branches()
454 list->mux_shift, list->mux_width, in rockchip_clk_register_branches()
486 list->mux_shift, list->mux_width, in rockchip_clk_register_branches()
504 list->mux_shift, in rockchip_clk_register_branches()
538 list->muxdiv_offset, list->mux_shift, in rockchip_clk_register_branches()
A Dclk-half-divider.c161 int muxdiv_offset, u8 mux_shift, in rockchip_clk_register_halfdiv() argument
182 mux->shift = mux_shift; in rockchip_clk_register_halfdiv()
/linux/drivers/clk/mediatek/
A Dclk-mux.c78 val = (val >> mux->data->mux_shift) & mask; in mtk_clk_mux_get_parent()
96 val = (orig & ~(mask << mux->data->mux_shift)) in mtk_clk_mux_set_parent_setclr_lock()
97 | (index << mux->data->mux_shift); in mtk_clk_mux_set_parent_setclr_lock()
101 mask << mux->data->mux_shift); in mtk_clk_mux_set_parent_setclr_lock()
103 index << mux->data->mux_shift); in mtk_clk_mux_set_parent_setclr_lock()
A Dclk-mtk.h70 signed char mux_shift; member
87 .mux_shift = _shift, \
123 .mux_shift = _shift, \
142 .mux_shift = -1, \
A Dclk-mux.h31 u8 mux_shift; member
49 .mux_shift = _shift, \
A Dclk-mtk.c178 if (mc->mux_shift >= 0) { in mtk_clk_register_composite()
185 mux->shift = mc->mux_shift; in mtk_clk_register_composite()
A Dclk-cpumux.c68 cpumux->shift = mux->mux_shift; in mtk_clk_register_cpumux()
/linux/drivers/clk/
A Dclk-bm1880.c119 s8 mux_shift; member
156 .mux_shift = -1, \
170 .mux_shift = _mux_shift, \
784 if (clks->mux_shift >= 0) { in bm1880_clk_register_composite()
791 mux->shift = clks->mux_shift; in bm1880_clk_register_composite()
/linux/drivers/pinctrl/
A Dpinctrl-pistachio.c89 int mux_shift; member
644 .mux_shift = -1, \
658 .mux_shift = -1, \
672 .mux_shift = _shift, \
965 val &= ~(pg->mux_mask << pg->mux_shift); in pistachio_pinmux_enable()
966 val |= i << pg->mux_shift; in pistachio_pinmux_enable()
A Dpinctrl-zynq.c73 u8 mux_shift; member
771 .mux_shift = shift, \
912 reg |= pgrp->pins[0] << func->mux_shift; in zynq_pinmux_set_mux()
A Dpinctrl-bm1880.c69 u8 mux_shift; member
/linux/drivers/clk/x86/
A Dclk-cgu.h182 u8 mux_shift; member
216 .mux_shift = _shift, \
A Dclk-cgu.c95 u8 shift = list->mux_shift; in lgm_clk_register_mux()
/linux/drivers/pinctrl/freescale/
A Dpinctrl-imx.h101 u8 mux_shift; member
A Dpinctrl-imx8ulp.c248 .mux_shift = BP_MUX_MODE,
A Dpinctrl-imx7ulp.c290 .mux_shift = BP_MUX_MODE,
A Dpinctrl-vf610.c322 .mux_shift = 20,
A Dpinctrl-imx.c185 reg |= (pin_mmio->mux_mode << info->mux_shift); in imx_pmx_set_one_pin_mmio()
/linux/drivers/soc/tegra/
A Dpmc.c194 u32 mux_shift; member
213 u8 mux_shift; member
235 .mux_shift = 6,
243 .mux_shift = 14,
251 .mux_shift = 22,
2489 val = tegra_pmc_readl(pmc, clk->offs) >> clk->mux_shift; in pmc_clk_mux_get_parent()
2501 val &= ~(PMC_CLK_OUT_MUX_MASK << clk->mux_shift); in pmc_clk_mux_set_parent()
2502 val |= index << clk->mux_shift; in pmc_clk_mux_set_parent()
2575 pmc_clk->mux_shift = data->mux_shift; in tegra_pmc_clk_out_register()
/linux/sound/soc/intel/atom/
A Dsst-atom-controls.h569 const int *mux_shift; member

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