Searched refs:pcw (Results 1 – 3 of 3) sorted by relevance
65 u32 pcw, int postdiv) in __mtk_pll_recalc_rate() argument78 vco = (u64)fin * pcw; in __mtk_pll_recalc_rate()139 val |= pcw << pll->data->pcw_shift; in mtk_pll_set_rate_regs()195 *pcw = (u32)_pcw; in mtk_pll_calc_values()202 u32 pcw = 0; in mtk_pll_set_rate() local206 mtk_pll_set_rate_regs(pll, pcw, postdiv); in mtk_pll_set_rate()216 u32 pcw; in mtk_pll_recalc_rate() local221 pcw = readl(pll->pcw_addr) >> pll->data->pcw_shift; in mtk_pll_recalc_rate()222 pcw &= GENMASK(pll->data->pcwbits - 1, 0); in mtk_pll_recalc_rate()231 u32 pcw = 0; in mtk_pll_round_rate() local[all …]
50 u64 pcw; in mtk_mipi_tx_pll_enable() local79 pcw = div_u64(((u64)mipi_tx->data_rate * txdiv) << 24, 26000000); in mtk_mipi_tx_pll_enable()80 writel(pcw, mipi_tx->regs + MIPITX_PLL_CON0); in mtk_mipi_tx_pll_enable()
120 u64 pcw; in mtk_mipi_tx_pll_prepare() local185 pcw = div_u64(((u64)mipi_tx->data_rate * 2 * txdiv) << 24, in mtk_mipi_tx_pll_prepare()187 writel(pcw, mipi_tx->regs + MIPITX_DSI_PLL_CON2); in mtk_mipi_tx_pll_prepare()
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