Searched refs:pll_clock (Results 1 – 10 of 10) sorted by relevance
| /linux/drivers/clk/h8300/ |
| A D | clk-h8s2678.c | 20 struct pll_clock { struct
31 struct pll_clock *pll_clock = to_pll_clock(hw); in pll_recalc_rate() local
65 struct pll_clock *pll_clock = to_pll_clock(hw); in pll_set_rate() local
69 val = readb(pll_clock->sckcr); in pll_set_rate()
91 struct pll_clock *pll_clock; in h8s2678_pll_clk_setup() local
102 pll_clock = kzalloc(sizeof(*pll_clock), GFP_KERNEL); in h8s2678_pll_clk_setup()
103 if (!pll_clock) in h8s2678_pll_clk_setup()
124 pll_clock->hw.init = &init; in h8s2678_pll_clk_setup()
137 iounmap(pll_clock->pllcr); in h8s2678_pll_clk_setup()
139 iounmap(pll_clock->sckcr); in h8s2678_pll_clk_setup()
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| /linux/drivers/ata/ |
| A D | pata_pdc2027x.c | 512 static void pdc_adjust_pll(struct ata_host *host, long pll_clock, unsigned int board_idx) in pdc_adjust_pll() argument
516 long pll_clock_khz = pll_clock / 1000; in pdc_adjust_pll()
604 long pll_clock, usec_elapsed; in pdc_detect_pll_input_clock() local
632 pll_clock = ((start_count - end_count) & 0x3fffffff) / 100 * in pdc_detect_pll_input_clock()
636 PDPRINTK("PLL input clock[%ld]Hz\n", pll_clock); in pdc_detect_pll_input_clock()
638 return pll_clock; in pdc_detect_pll_input_clock()
648 long pll_clock; in pdc_hardware_init() local
656 pll_clock = pdc_detect_pll_input_clock(host); in pdc_hardware_init()
658 dev_info(host->dev, "PLL input clock %ld kHz\n", pll_clock/1000); in pdc_hardware_init()
661 pdc_adjust_pll(host, pll_clock, board_idx); in pdc_hardware_init()
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| /linux/Documentation/devicetree/bindings/clock/ |
| A D | axs10x-i2s-pll-clock.txt | 14 pll_clock: pll_clock {
23 clocks = <&pll_clock>;
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| /linux/drivers/clk/axs10x/ |
| A D | Makefile | 3 obj-y += pll_clock.o
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| /linux/drivers/gpu/drm/i915/display/ |
| A D | intel_dpll.h | 37 int chv_calc_dpll_params(int refclk, struct dpll *pll_clock);
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| /linux/include/uapi/linux/ |
| A D | rtc.h | 67 long pll_clock; /* base PLL frequency */ member
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| /linux/arch/m68k/q40/ |
| A D | config.c | 269 pll->pll_clock = 125829120; in q40_get_rtc_pll()
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| /linux/drivers/gpu/drm/vc4/ |
| A D | vc4_dsi.c | 802 unsigned long pll_clock = pixel_clock_hz * dsi->divider; in vc4_dsi_encoder_mode_fixup() local
809 if (parent_rate / divider < pll_clock) { in vc4_dsi_encoder_mode_fixup()
818 pll_clock = parent_rate / divider; in vc4_dsi_encoder_mode_fixup()
819 pixel_clock_hz = pll_clock / dsi->divider; in vc4_dsi_encoder_mode_fixup()
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | atombios_crtc.c | 824 u32 pll_clock = mode->clock; in amdgpu_atombios_crtc_set_pll() local
854 amdgpu_pll_compute(adev, pll, amdgpu_crtc->adjusted_clock, &pll_clock, in amdgpu_atombios_crtc_set_pll()
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| /linux/drivers/gpu/drm/radeon/ |
| A D | atombios_crtc.c | 1069 u32 pll_clock = mode->clock; in atombios_crtc_set_pll() local
1102 radeon_compute_pll_legacy(pll, radeon_crtc->adjusted_clock, &pll_clock, in atombios_crtc_set_pll()
1105 radeon_compute_pll_avivo(pll, radeon_crtc->adjusted_clock, &pll_clock, in atombios_crtc_set_pll()
1108 radeon_compute_pll_legacy(pll, radeon_crtc->adjusted_clock, &pll_clock, in atombios_crtc_set_pll()
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