Searched refs:pp_funcs (Results 1 – 10 of 10) sorted by relevance
378 if (pp_funcs && pp_funcs->get_clock_by_type_with_latency) { in dm_pp_get_clock_levels_by_type_with_latency()402 if (pp_funcs && pp_funcs->get_clock_by_type_with_voltage) { in dm_pp_get_clock_levels_by_type_with_voltage()551 if (pp_funcs && pp_funcs->notify_smu_enable_pwe) in pp_rv_set_pme_wa_enable()562 if (!pp_funcs || !pp_funcs->set_active_display_count) in pp_rv_set_active_display_count()575 if (!pp_funcs || !pp_funcs->set_min_deep_sleep_dcefclk) in pp_rv_set_min_deep_sleep_dcfclk()588 if (!pp_funcs || !pp_funcs->set_hard_min_dcefclk_by_freq) in pp_rv_set_hard_min_dcefclk_by_freq()601 if (!pp_funcs || !pp_funcs->set_hard_min_fclk_by_freq) in pp_rv_set_hard_min_fclk_by_freq()628 if (!pp_funcs || !pp_funcs->set_active_display_count) in pp_nv_set_display_count()646 if (!pp_funcs || !pp_funcs->set_min_deep_sleep_dcefclk) in pp_nv_set_min_deep_sleep_dcfclk()782 if (!pp_funcs || !pp_funcs->get_uclk_dpm_states) in pp_nv_get_uclk_dpm_states()[all …]
260 ((adev)->powerplay.pp_funcs->set_power_state((adev)->powerplay.pp_handle))272 ((adev)->powerplay.pp_funcs->vblank_too_short((adev)->powerplay.pp_handle))317 ((adev)->powerplay.pp_funcs->get_sclk_od((adev)->powerplay.pp_handle))323 ((adev)->powerplay.pp_funcs->get_mclk_od((adev)->powerplay.pp_handle))341 ((adev)->powerplay.pp_funcs->reset_power_profile_state(\345 ((adev)->powerplay.pp_funcs->get_power_profile_mode(\349 ((adev)->powerplay.pp_funcs->set_power_profile_mode(\353 ((adev)->powerplay.pp_funcs->set_fine_grain_clk_vol(\357 ((adev)->powerplay.pp_funcs->odn_edit_dpm_table(\361 ((adev)->powerplay.pp_funcs->get_ppfeature_status(\[all …]
1001 if (!pp_funcs || !pp_funcs->set_asic_baco_state) in amdgpu_dpm_baco_enter()1016 if (!pp_funcs || !pp_funcs->set_asic_baco_state) in amdgpu_dpm_baco_exit()1031 if (pp_funcs && pp_funcs->set_mp1_state) { in amdgpu_dpm_set_mp1_state()1060 if (!pp_funcs || !pp_funcs->asic_reset_mode_2) in amdgpu_dpm_mode2_reset()1072 if (!pp_funcs || !pp_funcs->set_asic_baco_state) in amdgpu_dpm_baco_reset()1118 if (pp_funcs && pp_funcs->switch_power_profile) in amdgpu_dpm_switch_power_profile()1131 if (pp_funcs && pp_funcs->set_xgmi_pstate) in amdgpu_dpm_set_xgmi_pstate()1145 if (pp_funcs && pp_funcs->set_df_cstate) in amdgpu_dpm_set_df_cstate()1168 if (pp_funcs && pp_funcs->enable_mgpu_fan_boost) in amdgpu_dpm_enable_mgpu_fan_boost()1197 if (pp_funcs && pp_funcs->smu_i2c_bus_access) in amdgpu_dpm_smu_i2c_bus_access()[all …]
125 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_get_power_dpm_state() local311 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_set_power_dpm_force_performance_level() local414 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_get_pp_num_states() local430 if (pp_funcs->get_pp_num_states) { in amdgpu_get_pp_num_states()456 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_get_pp_cur_state() local2919 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_hwmon_show_power_cap_generic() local2930 if ( !(pp_funcs && pp_funcs->get_power_limit)) in amdgpu_hwmon_show_power_cap_generic()2994 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_hwmon_set_power_cap() local3020 if (pp_funcs && pp_funcs->set_power_limit) in amdgpu_hwmon_set_power_cap()3716 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_pm_prv_buffer_read() local[all …]
865 if (adev->powerplay.pp_funcs && in amdgpu_gfx_state_change_set()866 adev->powerplay.pp_funcs->gfx_state_change_set) in amdgpu_gfx_state_change_set()867 ((adev)->powerplay.pp_funcs->gfx_state_change_set( in amdgpu_gfx_state_change_set()
772 const struct amd_pm_funcs *pp_funcs; member
59 adev->powerplay.pp_funcs = &pp_dpm_funcs; in amd_powerplay_create()
2969 adev->powerplay.pp_funcs = &kv_dpm_funcs; in kv_dpm_early_init()
7920 adev->powerplay.pp_funcs = &si_dpm_funcs; in si_dpm_early_init()
641 adev->powerplay.pp_funcs = &swsmu_pm_funcs; in smu_early_init()
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