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Searched refs:pstate (Results 1 – 25 of 141) sorted by relevance

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/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
A Dbase.c314 pstate = (pstate < 0) ? clk->astate : pstate; in nvkm_pstate_work()
315 pstate = min(pstate, clk->state_nr - 1); in nvkm_pstate_work()
316 pstate = max(pstate, clk->dstate); in nvkm_pstate_work()
318 pstate = clk->pstate = -1; in nvkm_pstate_work()
322 if (pstate != clk->pstate) { in nvkm_pstate_work()
354 if (pstate->pstate != 0xff) in nvkm_pstate_info()
418 pstate = kzalloc(sizeof(*pstate), GFP_KERNEL); in nvkm_pstate_new()
425 pstate->pstate = perfE.pstate; in nvkm_pstate_new()
446 pstate->pstate, in nvkm_pstate_new()
482 if (pstate->pstate == req) in nvkm_clk_ustate_update()
[all …]
/linux/arch/arm64/kernel/
A Dtraps.c51 return (pstate & PSR_Z_BIT) != 0; in __check_eq()
56 return (pstate & PSR_Z_BIT) == 0; in __check_ne()
61 return (pstate & PSR_C_BIT) != 0; in __check_cs()
91 pstate &= ~(pstate >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */ in __check_hi()
97 pstate &= ~(pstate >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */ in __check_ls()
103 pstate ^= (pstate << 3); /* PSR_N_BIT ^= PSR_V_BIT */ in __check_ge()
109 pstate ^= (pstate << 3); /* PSR_N_BIT ^= PSR_V_BIT */ in __check_lt()
116 unsigned long temp = pstate ^ (pstate << 3); in __check_gt()
125 unsigned long temp = pstate ^ (pstate << 3); in __check_le()
312 u32 it, pstate = regs->pstate; in compat_get_it_state() local
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A Dprocess.c160 u64 pstate = regs->pstate; in print_pstate() local
164 pstate, in print_pstate()
182 pstate, in print_pstate()
183 pstate & PSR_N_BIT ? 'N' : 'n', in print_pstate()
184 pstate & PSR_Z_BIT ? 'Z' : 'z', in print_pstate()
185 pstate & PSR_C_BIT ? 'C' : 'c', in print_pstate()
186 pstate & PSR_V_BIT ? 'V' : 'v', in print_pstate()
187 pstate & PSR_D_BIT ? 'D' : 'd', in print_pstate()
188 pstate & PSR_A_BIT ? 'A' : 'a', in print_pstate()
189 pstate & PSR_I_BIT ? 'I' : 'i', in print_pstate()
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/linux/tools/power/cpupower/utils/helpers/
A Damd.c30 } pstate; member
44 static int get_did(union core_pstate pstate) in get_did() argument
49 t = pstate.pstatedef.did; in get_did()
51 t = pstate.val & 0xf; in get_did()
53 t = pstate.pstate.did; in get_did()
63 did = get_did(pstate); in get_cof()
65 fid = pstate.pstatedef.fid; in get_cof()
69 fid = pstate.pstate.fid; in get_cof()
93 union core_pstate pstate; in decode_pstates() local
117 if (!pstate.pstatedef.en) in decode_pstates()
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/linux/drivers/gpu/drm/msm/disp/dpu1/
A Ddpu_plane.c223 pstate->plane_clk = in _dpu_plane_calc_clk()
852 pstate[R0]->multirect_mode, pstate[R0]->multirect_index); in dpu_plane_validate_multirect_v2()
854 pstate[R1]->multirect_mode, pstate[R1]->multirect_index); in dpu_plane_validate_multirect_v2()
895 if (pstate->aspace) { in dpu_plane_prepare_fb()
897 pstate->aspace); in dpu_plane_prepare_fb()
1099 pstate->pending = true; in dpu_plane_sspp_atomic_update()
1136 &pstate->pixel_ext); in dpu_plane_sspp_atomic_update()
1303 if (!pstate) { in dpu_plane_duplicate_state()
1314 return &pstate->base; in dpu_plane_duplicate_state()
1336 pstate = kzalloc(sizeof(*pstate), GFP_KERNEL); in dpu_plane_reset()
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A Ddpu_crtc.c275 fg_alpha = pstate->base.alpha >> 8; in _dpu_crtc_setup_blend_cfg()
371 pstate->stage, in _dpu_crtc_blend_setup_mixer()
385 pstate->multirect_index; in _dpu_crtc_blend_setup_mixer()
388 state, pstate, stage_idx, in _dpu_crtc_blend_setup_mixer()
396 pstate, format); in _dpu_crtc_blend_setup_mixer()
404 1 << pstate->stage; in _dpu_crtc_blend_setup_mixer()
1087 if (IS_ERR_OR_NULL(pstate)) { in dpu_crtc_atomic_check()
1088 rc = PTR_ERR(pstate); in dpu_crtc_atomic_check()
1339 if (!pstate || !state) in _dpu_debugfs_status_show()
1343 pstate->stage); in _dpu_debugfs_status_show()
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/linux/drivers/cpufreq/
A Dintel_pstate.c587 cpu->pstate.max_pstate == cpu->pstate.turbo_pstate); in update_turbo_state()
932 cpu->pstate.max_freq = rounddown(cpu->pstate.max_freq, in intel_pstate_get_hwp_cap()
1723 int_tofp(pstate - cpudata->pstate.min_pstate), in atom_get_val()
1729 if (pstate > cpudata->pstate.max_pstate) in atom_get_val()
1948 cpu->pstate.current_pstate = pstate; in intel_pstate_set_pstate()
2197 cpu->pstate.max_pstate : cpu->pstate.turbo_pstate; in get_target_pstate()
2227 if (pstate == cpu->pstate.current_pstate) in intel_pstate_update_pstate()
2230 cpu->pstate.current_pstate = pstate; in intel_pstate_update_pstate()
2466 cpu->pstate.max_freq : cpu->pstate.turbo_freq; in intel_pstate_get_max_freq()
2602 cpu->pstate.max_freq : cpu->pstate.turbo_freq; in intel_pstate_verify_cpu_policy()
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A Dbrcmstb-avs-cpufreq.c396 *pstate = args[0]; in brcm_avs_get_pstate()
405 args[0] = pstate; in brcm_avs_set_pstate()
429 unsigned int pstate; in brcm_avs_get_freq_table() local
433 ret = brcm_avs_get_pstate(priv, &pstate); in brcm_avs_get_freq_table()
452 ret = brcm_avs_set_pstate(priv, pstate); in brcm_avs_get_freq_table()
637 unsigned int pstate; in brcm_avs_cpufreq_init() local
639 ret = brcm_avs_get_pstate(priv, &pstate); in brcm_avs_cpufreq_init()
641 policy->cur = freq_table[pstate].frequency; in brcm_avs_cpufreq_init()
655 unsigned int pstate; in show_brcm_avs_pstate() local
657 if (brcm_avs_get_pstate(priv, &pstate)) in show_brcm_avs_pstate()
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/linux/arch/arm64/include/asm/
A Dptrace.h151 unsigned long pstate; in compat_psr_to_pstate() local
153 pstate = psr & ~COMPAT_PSR_DIT_BIT; in compat_psr_to_pstate()
156 pstate |= PSR_AA32_DIT_BIT; in compat_psr_to_pstate()
158 return pstate; in compat_psr_to_pstate()
165 psr = pstate & ~PSR_AA32_DIT_BIT; in pstate_to_compat_psr()
167 if (pstate & PSR_AA32_DIT_BIT) in pstate_to_compat_psr()
185 u64 pstate; member
222 (((regs)->pstate & PSR_AA32_T_BIT))
235 ((regs)->pstate & PSR_MODE_MASK)
246 (!((regs)->pstate & PSR_F_BIT))
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/linux/drivers/gpu/drm/arm/
A Dmalidp_crtc.c258 const struct drm_plane_state *pstate; in malidp_crtc_atomic_check_scaling() local
285 pstate->src_w); in malidp_crtc_atomic_check_scaling()
287 pstate->src_h); in malidp_crtc_atomic_check_scaling()
293 s->input_w = pstate->src_h >> 16; in malidp_crtc_atomic_check_scaling()
294 s->input_h = pstate->src_w >> 16; in malidp_crtc_atomic_check_scaling()
296 s->input_w = pstate->src_w >> 16; in malidp_crtc_atomic_check_scaling()
297 s->input_h = pstate->src_h >> 16; in malidp_crtc_atomic_check_scaling()
300 s->output_w = pstate->crtc_w; in malidp_crtc_atomic_check_scaling()
301 s->output_h = pstate->crtc_h; in malidp_crtc_atomic_check_scaling()
347 const struct drm_plane_state *pstate; in malidp_crtc_atomic_check() local
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/linux/samples/bpf/
A Dcpustat_kern.c106 u64 *cts, *pts, *cstate, *pstate, prev_state, cur_ts, delta; in bpf_prog1() local
131 pstate = bpf_map_lookup_elem(&my_map, &key); in bpf_prog1()
132 if (!pstate) in bpf_prog1()
171 pstate_idx = find_cpu_pstate_idx(*pstate); in bpf_prog1()
214 u64 *pts, *cstate, *pstate, prev_state, cur_ts, delta; in bpf_prog2() local
226 pstate = bpf_map_lookup_elem(&my_map, &key); in bpf_prog2()
227 if (!pstate) in bpf_prog2()
235 prev_state = *pstate; in bpf_prog2()
236 *pstate = ctx->state; in bpf_prog2()
268 pstate_idx = find_cpu_pstate_idx(*pstate); in bpf_prog2()
/linux/drivers/gpu/drm/nouveau/nvkm/engine/device/
A Dctrl.c55 args->v0.pstate = clk->pstate; in nvkm_control_mthd_pstate_info()
61 args->v0.pstate = NVIF_CONTROL_PSTATE_INFO_V0_PSTATE_UNKNOWN; in nvkm_control_mthd_pstate_info()
75 struct nvkm_pstate *pstate; in nvkm_control_mthd_pstate_attr() local
106 list_for_each_entry(pstate, &clk->states, head) { in nvkm_control_mthd_pstate_attr()
111 lo = pstate->base.domain[domain->name]; in nvkm_control_mthd_pstate_attr()
113 list_for_each_entry(cstate, &pstate->list, head) { in nvkm_control_mthd_pstate_attr()
118 args->v0.state = pstate->pstate; in nvkm_control_mthd_pstate_attr()
/linux/drivers/regulator/
A Dpwm-regulator.c86 struct pwm_state pstate; in pwm_regulator_set_voltage_sel() local
89 pwm_init_state(drvdata->pwm, &pstate); in pwm_regulator_set_voltage_sel()
90 pwm_set_relative_duty_cycle(&pstate, in pwm_regulator_set_voltage_sel()
93 ret = pwm_apply_state(drvdata->pwm, &pstate); in pwm_regulator_set_voltage_sel()
154 struct pwm_state pstate; in pwm_regulator_get_voltage() local
158 pwm_get_state(drvdata->pwm, &pstate); in pwm_regulator_get_voltage()
160 voltage = pwm_get_relative_duty_cycle(&pstate, duty_unit); in pwm_regulator_get_voltage()
191 struct pwm_state pstate; in pwm_regulator_set_voltage() local
196 pwm_init_state(drvdata->pwm, &pstate); in pwm_regulator_set_voltage()
217 pwm_set_relative_duty_cycle(&pstate, dutycycle, duty_unit); in pwm_regulator_set_voltage()
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/linux/drivers/gpu/drm/msm/disp/mdp5/
A Dmdp5_plane.c73 pstate->hwpipe->name : "(null)"); in mdp5_plane_atomic_print_state()
76 pstate->r_hwpipe ? pstate->r_hwpipe->name : in mdp5_plane_atomic_print_state()
130 kfree(pstate); in mdp5_plane_destroy_state()
947 if (WARN_ON(!pstate->hwpipe)) in mdp5_plane_pipe()
950 return pstate->hwpipe->pipe; in mdp5_plane_pipe()
957 if (!pstate->r_hwpipe) in mdp5_plane_right_pipe()
960 return pstate->r_hwpipe->pipe; in mdp5_plane_right_pipe()
968 if (WARN_ON(!pstate->hwpipe)) in mdp5_plane_get_flush()
971 mask = pstate->hwpipe->flush_mask; in mdp5_plane_get_flush()
973 if (pstate->r_hwpipe) in mdp5_plane_get_flush()
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/linux/arch/sparc/kernel/
A Drtrap_64.S28 661: wrpr %g0, RTRAP_PSTATE, %pstate
36 wrpr %g0, RTRAP_PSTATE|PSTATE_MCDE, %pstate
39 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
44 661: wrpr %g0, RTRAP_PSTATE, %pstate
52 wrpr %g0, RTRAP_PSTATE|PSTATE_MCDE, %pstate
55 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
70 661: wrpr %g0, RTRAP_PSTATE, %pstate
78 wrpr %g0, RTRAP_PSTATE|PSTATE_MCDE, %pstate
80 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
159 to_user: wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
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A Dspiterrs.S159 rdpr %pstate, %g4
160 wrpr %g4, PSTATE_MG|PSTATE_AG, %pstate
187 rdpr %pstate, %g4
188 wrpr %g4, PSTATE_MG|PSTATE_AG, %pstate
207 rdpr %pstate, %g4
208 wrpr %g4, PSTATE_MG|PSTATE_AG, %pstate
226 rdpr %pstate, %g4
227 wrpr %g4, PSTATE_MG|PSTATE_AG, %pstate
A Dtsb.S147 661: rdpr %pstate, %g5
148 wrpr %g5, PSTATE_AG | PSTATE_MG, %pstate
254 661: rdpr %pstate, %g5
255 wrpr %g5, PSTATE_AG | PSTATE_MG, %pstate
320 rdpr %pstate, %o5
321 wrpr %o5, PSTATE_IE, %pstate
324 wrpr %o5, %pstate
374 rdpr %pstate, %g1
375 wrpr %g1, PSTATE_IE, %pstate
457 wrpr %g1, %pstate
/linux/drivers/net/wwan/
A Dwwan_hwsim.c61 } pstate; member
105 port->pstate = AT_PARSER_WAIT_A; in wwan_hwsim_port_start()
142 if (port->pstate == AT_PARSER_WAIT_A) { in wwan_hwsim_port_tx()
144 port->pstate = AT_PARSER_WAIT_T; in wwan_hwsim_port_tx()
146 port->pstate = AT_PARSER_SKIP_LINE; in wwan_hwsim_port_tx()
147 } else if (port->pstate == AT_PARSER_WAIT_T) { in wwan_hwsim_port_tx()
149 port->pstate = AT_PARSER_WAIT_TERM; in wwan_hwsim_port_tx()
151 port->pstate = AT_PARSER_SKIP_LINE; in wwan_hwsim_port_tx()
152 } else if (port->pstate == AT_PARSER_WAIT_TERM) { in wwan_hwsim_port_tx()
162 port->pstate = AT_PARSER_WAIT_A; in wwan_hwsim_port_tx()
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/linux/drivers/gpu/drm/tve200/
A Dtve200_display.c71 struct drm_plane_state *pstate, in tve200_display_check() argument
76 struct drm_framebuffer *fb = pstate->fb; in tve200_display_check()
92 u32 offset = drm_fb_cma_get_gem_addr(fb, pstate, 0); in tve200_display_check()
264 struct drm_plane_state *pstate = plane->state; in tve200_display_update() local
265 struct drm_framebuffer *fb = pstate->fb; in tve200_display_update()
269 writel(drm_fb_cma_get_gem_addr(fb, pstate, 0), in tve200_display_update()
274 writel(drm_fb_cma_get_gem_addr(fb, pstate, 1), in tve200_display_update()
276 writel(drm_fb_cma_get_gem_addr(fb, pstate, 2), in tve200_display_update()
/linux/drivers/thermal/intel/
A Dtherm_throt.c318 struct thermal_state *pstate = &per_cpu(thermal_state, this_cpu); in therm_throt_process() local
323 state = &pstate->core_throttle; in therm_throt_process()
325 state = &pstate->core_power_limit; in therm_throt_process()
330 state = &pstate->package_throttle; in therm_throt_process()
332 state = &pstate->package_power_limit; in therm_throt_process()
378 struct thermal_state *pstate = &per_cpu(thermal_state, this_cpu); in thresh_event_valid() local
382 state = (event == 0) ? &pstate->pkg_thresh0 : in thresh_event_valid()
383 &pstate->pkg_thresh1; in thresh_event_valid()
385 state = (event == 0) ? &pstate->core_thresh0 : in thresh_event_valid()
386 &pstate->core_thresh1; in thresh_event_valid()
/linux/arch/arm64/kvm/hyp/include/hyp/
A Dsysreg-sr.h78 ctxt->regs.pstate = read_sysreg_el2(SYS_SPSR); in __sysreg_save_el2_return_state()
161 u64 pstate = ctxt->regs.pstate; in __sysreg_restore_el2_return_state() local
162 u64 mode = pstate & PSR_AA32_MODE_MASK; in __sysreg_restore_el2_return_state()
176 pstate = PSR_MODE_EL2h | PSR_IL_BIT; in __sysreg_restore_el2_return_state()
179 write_sysreg_el2(pstate, SYS_SPSR); in __sysreg_restore_el2_return_state()
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
A Dcstep.c78 info->pstate = (nvbios_rd16(bios, data + 0x00) & 0x01e0) >> 5; in nvbios_cstepEp()
85 nvbios_cstepEm(struct nvkm_bios *bios, u8 pstate, u8 *ver, u8 *hdr, in nvbios_cstepEm() argument
90 if (info->pstate == pstate) in nvbios_cstepEm()
/linux/arch/sparc/mm/
A Dultra.S60 rdpr %pstate, %g7
62 wrpr %g2, %pstate
77 wrpr %g7, 0x0, %pstate
87 rdpr %pstate, %g7
90 wrpr %g2, %pstate
109 wrpr %g7, 0x0, %pstate
174 rdpr %pstate, %g1
184 wrpr %g1, 0, %pstate
251 rdpr %pstate, %g7
273 rdpr %pstate, %g7
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/linux/drivers/gpu/drm/amd/amdgpu/
A Damdgpu_xgmi.c402 hive->pstate = AMDGPU_XGMI_PSTATE_UNKNOWN; in amdgpu_get_xgmi_hive()
424 int amdgpu_xgmi_set_pstate(struct amdgpu_device *adev, int pstate) in amdgpu_xgmi_set_pstate() argument
429 bool is_hi_req = pstate == AMDGPU_XGMI_PSTATE_MAX_VEGA20; in amdgpu_xgmi_set_pstate()
437 init_low = hive->pstate == AMDGPU_XGMI_PSTATE_UNKNOWN; in amdgpu_xgmi_set_pstate()
456 if (hive->pstate == pstate || in amdgpu_xgmi_set_pstate()
460 dev_dbg(request_adev->dev, "Set xgmi pstate %d.\n", pstate); in amdgpu_xgmi_set_pstate()
462 ret = amdgpu_dpm_set_xgmi_pstate(request_adev, pstate); in amdgpu_xgmi_set_pstate()
472 hive->pstate = hive->hi_req_count ? in amdgpu_xgmi_set_pstate()
473 hive->pstate : AMDGPU_XGMI_PSTATE_MIN; in amdgpu_xgmi_set_pstate()
475 hive->pstate = pstate; in amdgpu_xgmi_set_pstate()
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/linux/arch/arm64/kvm/
A Dreset.c216 u32 pstate; in kvm_reset_vcpu() local
257 pstate = VCPU_RESET_PSTATE_SVC; in kvm_reset_vcpu()
259 pstate = VCPU_RESET_PSTATE_EL1; in kvm_reset_vcpu()
276 vcpu_gp_regs(vcpu)->pstate = pstate; in kvm_reset_vcpu()

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