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Searched refs:rd32 (Results 1 – 25 of 94) sorted by relevance

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/linux/drivers/net/ethernet/intel/igc/
A Digc_mac.c238 rd32(IGC_MPC); in igc_clear_hw_cntrs_base()
239 rd32(IGC_SCC); in igc_clear_hw_cntrs_base()
241 rd32(IGC_MCC); in igc_clear_hw_cntrs_base()
245 rd32(IGC_DC); in igc_clear_hw_cntrs_base()
261 rd32(IGC_RUC); in igc_clear_hw_cntrs_base()
262 rd32(IGC_RFC); in igc_clear_hw_cntrs_base()
263 rd32(IGC_ROC); in igc_clear_hw_cntrs_base()
264 rd32(IGC_RJC); in igc_clear_hw_cntrs_base()
269 rd32(IGC_TPR); in igc_clear_hw_cntrs_base()
270 rd32(IGC_TPT); in igc_clear_hw_cntrs_base()
[all …]
A Digc_i225.c48 swsm = rd32(IGC_SWSM); in igc_get_hw_semaphore_i225()
64 swsm = rd32(IGC_SWSM); in igc_get_hw_semaphore_i225()
81 swsm = rd32(IGC_SWSM); in igc_get_hw_semaphore_i225()
245 rd32(IGC_SRWR)) { in igc_write_nvm_srwr()
349 reg = rd32(IGC_EECD); in igc_pool_flash_update_done_i225()
456 eec = rd32(IGC_EECD); in igc_get_flash_presence_i225()
506 eeer = rd32(IGC_EEER); in igc_set_eee_i225()
541 rd32(IGC_IPCNFG); in igc_set_eee_i225()
542 rd32(IGC_EEER); in igc_set_eee_i225()
570 ltrc = rd32(IGC_LTRC) | in igc_set_ltr_i225()
[all …]
A Digc_base.c40 ctrl = rd32(IGC_CTRL); in igc_reset_hw_base()
56 rd32(IGC_ICR); in igc_reset_hw_base()
68 u32 eecd = rd32(IGC_EECD); in igc_init_nvm_params_base()
113 ctrl = rd32(IGC_CTRL); in igc_setup_copper_link_base()
340 rfctl = rd32(IGC_RFCTL); in igc_rx_fifo_flush_base()
349 rxdctl[i] = rd32(IGC_RXDCTL(i)); in igc_rx_fifo_flush_base()
372 rlpml = rd32(IGC_RLPML); in igc_rx_fifo_flush_base()
375 rctl = rd32(IGC_RCTL); in igc_rx_fifo_flush_base()
396 rd32(IGC_ROC); in igc_rx_fifo_flush_base()
397 rd32(IGC_RNBC); in igc_rx_fifo_flush_base()
[all …]
A Digc_ptp.c31 nsec = rd32(IGC_SYSTIML); in igc_ptp_read()
32 sec = rd32(IGC_SYSTIMH); in igc_ptp_read()
178 ctrl = rd32(IGC_CTRL); in igc_pin_perout()
224 ctrl = rd32(IGC_CTRL); in igc_pin_extts()
288 tsim = rd32(IGC_TSIM); in igc_ptp_feature_enable_i225()
505 val = rd32(IGC_RXPBS); in igc_ptp_disable_rx_timestamp()
516 val = rd32(IGC_RXPBS); in igc_ptp_enable_rx_timestamp()
549 rd32(IGC_TXSTMPL); in igc_ptp_enable_tx_timestamp()
550 rd32(IGC_TXSTMPH); in igc_ptp_enable_tx_timestamp()
615 rd32(IGC_TXSTMPH); in igc_ptp_tx_timeout()
[all …]
A Digc_dump.c54 regs[n] = rd32(IGC_RDLEN(n)); in igc_regdump()
58 regs[n] = rd32(IGC_RDH(n)); in igc_regdump()
62 regs[n] = rd32(IGC_RDT(n)); in igc_regdump()
70 regs[n] = rd32(IGC_RDBAL(n)); in igc_regdump()
74 regs[n] = rd32(IGC_RDBAH(n)); in igc_regdump()
78 regs[n] = rd32(IGC_TDBAL(n)); in igc_regdump()
82 regs[n] = rd32(IGC_TDBAH(n)); in igc_regdump()
86 regs[n] = rd32(IGC_TDLEN(n)); in igc_regdump()
90 regs[n] = rd32(IGC_TDH(n)); in igc_regdump()
94 regs[n] = rd32(IGC_TDT(n)); in igc_regdump()
[all …]
A Digc_nvm.c23 reg = rd32(IGC_EERD); in igc_poll_eerd_eewr_done()
25 reg = rd32(IGC_EEWR); in igc_poll_eerd_eewr_done()
49 u32 eecd = rd32(IGC_EECD); in igc_acquire_nvm()
53 eecd = rd32(IGC_EECD); in igc_acquire_nvm()
59 eecd = rd32(IGC_EECD); in igc_acquire_nvm()
83 eecd = rd32(IGC_EECD); in igc_release_nvm()
122 data[i] = (rd32(IGC_EERD) >> IGC_NVM_RW_REG_DATA); in igc_read_nvm_eerd()
139 rar_high = rd32(IGC_RAH(0)); in igc_read_mac_addr()
140 rar_low = rd32(IGC_RAL(0)); in igc_read_mac_addr()
A Digc_ethtool.c179 regs_buff[0] = rd32(IGC_CTRL); in igc_ethtool_get_regs()
182 regs_buff[3] = rd32(IGC_MDIC); in igc_ethtool_get_regs()
186 regs_buff[5] = rd32(IGC_EECD); in igc_ethtool_get_regs()
192 regs_buff[6] = rd32(IGC_EICS); in igc_ethtool_get_regs()
193 regs_buff[7] = rd32(IGC_EICS); in igc_ethtool_get_regs()
194 regs_buff[8] = rd32(IGC_EIMS); in igc_ethtool_get_regs()
195 regs_buff[9] = rd32(IGC_EIMC); in igc_ethtool_get_regs()
201 regs_buff[12] = rd32(IGC_ICS); in igc_ethtool_get_regs()
1166 u32 mrqc = rd32(IGC_MRQC); in igc_ethtool_set_rss_hash_opt()
1589 eeer = rd32(IGC_EEER); in igc_ethtool_get_eee()
[all …]
A Digc_main.c802 rctl = rd32(IGC_RCTL); in igc_setup_rctl()
853 tctl = rd32(IGC_TCTL); in igc_setup_tctl()
1620 ctrl = rd32(IGC_CTRL); in igc_vlan_mode()
3154 wufc = rd32(IGC_WUFC); in igc_write_flex_filter_ll()
3249 wufc = rd32(IGC_WUFC); in igc_find_avail_flex_filter_slot()
3270 wufc = rd32(IGC_WUFC); in igc_flex_filter_in_use()
3384 wufc = rd32(IGC_WUFC); in igc_del_flex_filter()
4581 rd32(IGC_ICR); in igc_up()
4678 mpc = rd32(IGC_MPC); in igc_update_stats()
5658 rd32(IGC_ICR); in __igc_open()
[all …]
A Digc_diag.c45 before = rd32(reg); in reg_pattern_test()
47 val = rd32(reg); in reg_pattern_test()
67 before = rd32(reg); in reg_set_and_check()
69 val = rd32(reg); in reg_set_and_check()
95 before = rd32(IGC_STATUS); in igc_reg_test()
98 after = rd32(IGC_STATUS) & toggle; in igc_reg_test()
A Digc_tsn.c63 tqavctrl = rd32(IGC_TQAVCTRL); in igc_tsn_disable_offload()
97 tqavctrl = rd32(IGC_TQAVCTRL); in igc_tsn_enable_offload()
189 tqavcc = rd32(IGC_TQAVCC(i)); in igc_tsn_enable_offload()
201 tqavcc = rd32(IGC_TQAVCC(i)); in igc_tsn_enable_offload()
213 nsec = rd32(IGC_SYSTIML); in igc_tsn_enable_offload()
214 sec = rd32(IGC_SYSTIMH); in igc_tsn_enable_offload()
A Digc_phy.c18 manc = rd32(IGC_MANC); in igc_check_reset_block()
190 phpm = rd32(IGC_I225_PHPM); in igc_phy_hw_reset()
192 ctrl = rd32(IGC_CTRL); in igc_phy_hw_reset()
204 phpm = rd32(IGC_I225_PHPM); in igc_phy_hw_reset()
585 mdic = rd32(IGC_MDIC); in igc_read_phy_reg_mdic()
642 mdic = rd32(IGC_MDIC); in igc_write_phy_reg_mdic()
/linux/drivers/net/ethernet/intel/igb/
A De1000_mac.c562 rd32(E1000_MPC); in igb_clear_hw_cntrs_base()
563 rd32(E1000_SCC); in igb_clear_hw_cntrs_base()
565 rd32(E1000_MCC); in igb_clear_hw_cntrs_base()
568 rd32(E1000_DC); in igb_clear_hw_cntrs_base()
569 rd32(E1000_SEC); in igb_clear_hw_cntrs_base()
585 rd32(E1000_RUC); in igb_clear_hw_cntrs_base()
586 rd32(E1000_RFC); in igb_clear_hw_cntrs_base()
587 rd32(E1000_ROC); in igb_clear_hw_cntrs_base()
588 rd32(E1000_RJC); in igb_clear_hw_cntrs_base()
593 rd32(E1000_TPR); in igb_clear_hw_cntrs_base()
[all …]
A De1000_82575.c1497 rd32(E1000_ICR); in igb_reset_hw_82575()
1883 rd32(E1000_PRC64); in igb_clear_hw_cntrs_82575()
1889 rd32(E1000_PTC64); in igb_clear_hw_cntrs_82575()
1898 rd32(E1000_TNCRS); in igb_clear_hw_cntrs_82575()
1900 rd32(E1000_TSCTC); in igb_clear_hw_cntrs_82575()
1907 rd32(E1000_IAC); in igb_clear_hw_cntrs_82575()
2008 rd32(E1000_ROC); in igb_rx_fifo_flush_82575()
2009 rd32(E1000_RNBC); in igb_rx_fifo_flush_82575()
2010 rd32(E1000_MPC); in igb_rx_fifo_flush_82575()
2316 rd32(E1000_ICR); in igb_reset_hw_82580()
[all …]
A Digb_ethtool.c147 0 : rd32(E1000_STATUS); in igb_get_link_ksettings()
1224 val = rd32(reg) & mask; in reg_pattern_test()
1244 val = rd32(reg); in reg_set_and_check()
1305 before = rd32(E1000_STATUS); in igb_reg_test()
1681 reg = rd32(E1000_CTRL_EXT); in igb_setup_loopback_test()
1702 reg = rd32(E1000_RCTL); in igb_setup_loopback_test()
1708 reg = rd32(E1000_CTRL); in igb_setup_loopback_test()
1717 reg = rd32(E1000_CONNSW); in igb_setup_loopback_test()
1770 rctl = rd32(E1000_RCTL); in igb_loopback_cleanup()
2703 etqf = rd32(E1000_ETQF(i)); in igb_rxnfc_write_etype_filter()
[all …]
A Digb_ptp.c81 lo = rd32(E1000_SYSTIML); in igb_ptp_read_82576()
82 hi = rd32(E1000_SYSTIMH); in igb_ptp_read_82576()
102 rd32(E1000_SYSTIMR); in igb_ptp_read_82580()
103 lo = rd32(E1000_SYSTIML); in igb_ptp_read_82580()
104 hi = rd32(E1000_SYSTIMH); in igb_ptp_read_82580()
123 rd32(E1000_SYSTIMR); in igb_ptp_read_i210()
321 rd32(E1000_SYSTIMR); in igb_ptp_gettimex_82580()
347 rd32(E1000_SYSTIMR); in igb_ptp_gettimex_i210()
702 rd32(E1000_TXSTMPH); in igb_ptp_tx_work()
767 rd32(E1000_RXSTMPH); in igb_ptp_rx_hang()
[all …]
A De1000_i210.c30 swsm = rd32(E1000_SWSM); in igb_get_hw_semaphore_i210()
46 swsm = rd32(E1000_SWSM); in igb_get_hw_semaphore_i210()
63 swsm = rd32(E1000_SWSM); in igb_get_hw_semaphore_i210()
131 swfw_sync = rd32(E1000_SW_FW_SYNC); in igb_acquire_swfw_sync_i210()
170 swfw_sync = rd32(E1000_SW_FW_SYNC); in igb_release_swfw_sync_i210()
254 rd32(E1000_SRWR)) { in igb_write_nvm_srwr()
634 reg = rd32(E1000_EECD); in igb_pool_flash_update_done_i210()
655 eec = rd32(E1000_EECD); in igb_get_flash_presence_i210()
834 wuc = rd32(E1000_WUC); in igb_pll_workaround_i210()
835 mdicnfg = rd32(E1000_MDICNFG); in igb_pll_workaround_i210()
[all …]
A Digb_main.c2136 rd32(E1000_TSICR); in igb_up()
2137 rd32(E1000_ICR); in igb_up()
2174 rctl = rd32(E1000_RCTL); in igb_down()
2184 tctl = rd32(E1000_TCTL); in igb_down()
4111 rd32(E1000_TSICR); in __igb_open()
4112 rd32(E1000_ICR); in __igb_open()
4599 val = rd32(reg); in igb_set_vf_vlan_strip()
6636 mpc = rd32(E1000_MPC); in igb_update_stats()
6733 reg = rd32(E1000_MANC); in igb_update_stats()
7412 reg = rd32(E1000_VFTE); in igb_vf_reset_msg()
[all …]
A De1000_nvm.c53 u32 eecd = rd32(E1000_EECD); in igb_shift_out_eec_bits()
98 eecd = rd32(E1000_EECD); in igb_shift_in_eec_bits()
107 eecd = rd32(E1000_EECD); in igb_shift_in_eec_bits()
135 reg = rd32(E1000_EERD); in igb_poll_eerd_eewr_done()
137 reg = rd32(E1000_EEWR); in igb_poll_eerd_eewr_done()
160 u32 eecd = rd32(E1000_EECD); in igb_acquire_nvm()
166 eecd = rd32(E1000_EECD); in igb_acquire_nvm()
172 eecd = rd32(E1000_EECD); in igb_acquire_nvm()
195 u32 eecd = rd32(E1000_EECD); in igb_standby_nvm()
220 eecd = rd32(E1000_EECD); in e1000_stop_nvm()
[all …]
A De1000_mbx.c244 u32 mbvficr = rd32(E1000_MBVFICR); in igb_check_for_bit_pf()
302 u32 vflre = rd32(E1000_VFLRE); in igb_check_for_rst_pf()
332 p2v_mailbox = rd32(E1000_P2VMAILBOX(vf_number)); in igb_obtain_mbx_lock_pf()
355 p2v_mailbox = rd32(E1000_P2VMAILBOX(vf_number)); in igb_release_mbx_lock_pf()
/linux/drivers/net/fjes/
A Dfjes_ethtool.c195 regs_buff[1] = rd32(XSCT_MAX_EP); in fjes_get_regs()
198 regs_buff[4] = rd32(XSCT_DCTL); in fjes_get_regs()
201 regs_buff[8] = rd32(XSCT_CR); in fjes_get_regs()
202 regs_buff[9] = rd32(XSCT_CS); in fjes_get_regs()
206 regs_buff[13] = rd32(XSCT_REQBL); in fjes_get_regs()
207 regs_buff[14] = rd32(XSCT_REQBAL); in fjes_get_regs()
215 regs_buff[32] = rd32(XSCT_IS); in fjes_get_regs()
216 regs_buff[33] = rd32(XSCT_IMS); in fjes_get_regs()
217 regs_buff[34] = rd32(XSCT_IMC); in fjes_get_regs()
218 regs_buff[35] = rd32(XSCT_IG); in fjes_get_regs()
[all …]
/linux/drivers/net/ethernet/intel/i40e/
A Di40e_ptp.c163 lo = rd32(hw, I40E_PRTTSYN_EVNT_L(0)); in i40e_ptp_extts0_work()
164 hi = rd32(hw, I40E_PRTTSYN_EVNT_H(0)); in i40e_ptp_extts0_work()
237 rd32(&pf->hw, I40E_PRTTSYN_TXTIME_L); in i40_ptp_reset_timing_events()
238 rd32(&pf->hw, I40E_PRTTSYN_TXTIME_H); in i40_ptp_reset_timing_events()
290 lo = rd32(hw, I40E_PRTTSYN_TIME_L); in i40e_ptp_read()
292 hi = rd32(hw, I40E_PRTTSYN_TIME_H); in i40e_ptp_read()
1274 rd32(hw, I40E_PRTTSYN_STAT_0); in i40e_ptp_set_timestamp_mode()
1275 rd32(hw, I40E_PRTTSYN_TXTIME_H); in i40e_ptp_set_timestamp_mode()
1276 rd32(hw, I40E_PRTTSYN_RXTIME_H(0)); in i40e_ptp_set_timestamp_mode()
1277 rd32(hw, I40E_PRTTSYN_RXTIME_H(1)); in i40e_ptp_set_timestamp_mode()
[all …]
A Di40e_dcb.c22 reg = rd32(hw, I40E_PRTDCB_GENS); in i40e_get_dcbx_status()
1396 reg = rd32(hw, I40E_PRTDCB_RPPMC); in i40e_dcb_hw_rx_cmd_monitor_config()
1435 reg = rd32(hw, I40E_PRTDCB_MFLCN); in i40e_dcb_hw_pfc_config()
1505 reg = rd32(hw, I40E_PRTDCB_RUP); in i40e_dcb_hw_pfc_config()
1511 reg = rd32(hw, I40E_PRTDCB_TDPMC); in i40e_dcb_hw_pfc_config()
1519 reg = rd32(hw, I40E_PRTDCB_TCPMC); in i40e_dcb_hw_pfc_config()
1723 reg = rd32(hw, I40E_PRTRPB_SLW); in i40e_dcb_hw_rx_pb_config()
1759 reg = rd32(hw, I40E_PRTRPB_SHW); in i40e_dcb_hw_rx_pb_config()
1803 reg = rd32(hw, I40E_PRTRPB_SPS); in i40e_dcb_hw_rx_pb_config()
1813 reg = rd32(hw, I40E_PRTRPB_SLW); in i40e_dcb_hw_rx_pb_config()
[all …]
A Di40e_diag.c22 orig_val = rd32(hw, reg); in i40e_diag_reg_pattern_test()
26 val = rd32(hw, reg); in i40e_diag_reg_pattern_test()
36 val = rd32(hw, reg); in i40e_diag_reg_pattern_test()
/linux/drivers/gpu/drm/nouveau/nvkm/core/
A Dgpuobj.c76 .rd32 = nvkm_gpuobj_rd32_fast,
84 .rd32 = nvkm_gpuobj_heap_rd32,
139 .rd32 = nvkm_gpuobj_rd32_fast,
147 .rd32 = nvkm_gpuobj_rd32,
/linux/drivers/net/ethernet/intel/iavf/
A Diavf_adminq.c272 reg = rd32(hw, hw->aq.asq.bal); in iavf_config_asq_regs()
304 reg = rd32(hw, hw->aq.arq.bal); in iavf_config_arq_regs()
581 while (rd32(hw, hw->aq.asq.head) != ntc) { in iavf_clean_asq()
583 "ntc %d head %d.\n", ntc, rd32(hw, hw->aq.asq.head)); in iavf_clean_asq()
618 return rd32(hw, hw->aq.asq.head) == hw->aq.asq.next_to_use; in iavf_asq_done()
657 val = rd32(hw, hw->aq.asq.head); in iavf_asq_send_command()
804 if (rd32(hw, hw->aq.asq.len) & IAVF_VF_ATQLEN1_ATQCRIT_MASK) { in iavf_asq_send_command()
872 ntu = rd32(hw, hw->aq.arq.head) & IAVF_VF_ARQH1_ARQH_MASK; in iavf_clean_arq_element()

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