| /linux/drivers/mmc/host/ |
| A D | sdhci-pci-dwc-mshc.c | 41 sdhci_writel(host, reg, (SDHC_AT_CTRL_R + vendor_ptr)); in sdhci_snps_set_clock() 49 sdhci_writel(host, reg, (SDHC_GPIO_OUT + vendor_ptr)); in sdhci_snps_set_clock() 53 sdhci_writel(host, DIV_REG_100_MHZ, SDHC_MMCM_DIV_REG); in sdhci_snps_set_clock() 54 sdhci_writel(host, CLKFBOUT_100_MHZ, in sdhci_snps_set_clock() 57 sdhci_writel(host, DIV_REG_200_MHZ, SDHC_MMCM_DIV_REG); in sdhci_snps_set_clock() 58 sdhci_writel(host, CLKFBOUT_200_MHZ, in sdhci_snps_set_clock() 65 sdhci_writel(host, reg, (SDHC_GPIO_OUT + vendor_ptr)); in sdhci_snps_set_clock()
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| A D | sdhci-milbeaut.c | 67 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); in sdhci_milbeaut_soft_voltage_switch() 69 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); in sdhci_milbeaut_soft_voltage_switch() 72 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); in sdhci_milbeaut_soft_voltage_switch() 77 sdhci_writel(host, ctrl, F_SDH30_TUNING_SETTING); in sdhci_milbeaut_soft_voltage_switch() 120 sdhci_writel(host, ctl, F_SDH30_ESD_CONTROL); in sdhci_milbeaut_reset() 138 sdhci_writel(host, 0, MLB_SOFT_RESET); in sdhci_milbeaut_bridge_reset() 169 sdhci_writel(host, val, MLB_CR_SET); in sdhci_milbeaut_bridge_init() 183 sdhci_writel(host, ctl, F_SDH30_IO_CONTROL2); in sdhci_milbeaut_vendor_init() 185 sdhci_writel(host, ctl, F_SDH30_IO_CONTROL2); in sdhci_milbeaut_vendor_init() 187 sdhci_writel(host, ctl, F_SDH30_IO_CONTROL2); in sdhci_milbeaut_vendor_init() [all …]
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| A D | sdhci-of-esdhc.c | 791 sdhci_writel(host, ctrl, ESDHC_PROCTL); in esdhc_pltfm_set_bus_width() 830 sdhci_writel(host, val, ESDHC_PROCTL); in esdhc_reset() 844 sdhci_writel(host, val, ESDHC_TBCTL); in esdhc_reset() 958 sdhci_writel(host, val, ESDHC_TBCTL); in esdhc_tuning_block_enable() 972 sdhci_writel(host, val, ESDHC_TBCTL); in esdhc_tuning_window_ptr() 978 sdhci_writel(host, val, ESDHC_TBCTL); in esdhc_tuning_window_ptr() 1038 sdhci_writel(host, val, ESDHC_TBPTR); in esdhc_execute_sw_tuning() 1044 sdhci_writel(host, val, ESDHC_TBCTL); in esdhc_execute_sw_tuning() 1094 sdhci_writel(host, val, ESDHC_TBCTL); in esdhc_execute_tuning() 1187 sdhci_writel(host, val, ESDHC_TBCTL); in esdhc_set_uhs_signaling() [all …]
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| A D | sdhci_f_sdh30.c | 37 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); in sdhci_f_sdh30_soft_voltage_switch() 39 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); in sdhci_f_sdh30_soft_voltage_switch() 42 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); in sdhci_f_sdh30_soft_voltage_switch() 49 sdhci_writel(host, ctrl, F_SDH30_ESD_CONTROL); in sdhci_f_sdh30_soft_voltage_switch() 54 sdhci_writel(host, ctrl, F_SDH30_TUNING_SETTING); in sdhci_f_sdh30_soft_voltage_switch() 75 sdhci_writel(host, ctl, F_SDH30_ESD_CONTROL); in sdhci_f_sdh30_reset() 163 sdhci_writel(host, reg & ~F_SDH30_EMMC_RST, F_SDH30_ESD_CONTROL); in sdhci_f_sdh30_probe() 165 sdhci_writel(host, reg | F_SDH30_EMMC_RST, F_SDH30_ESD_CONTROL); in sdhci_f_sdh30_probe()
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| A D | sdhci-of-dwcmshc.c | 172 sdhci_writel(host, vendor, reg); in dwcmshc_hs400_enhanced_strobe() 193 sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_RXCLK); in dwcmshc_rk3568_set_clock() 212 sdhci_writel(host, extra, reg); in dwcmshc_rk3568_set_clock() 216 sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_CTRL); in dwcmshc_rk3568_set_clock() 221 sdhci_writel(host, BIT(1), DWCMSHC_EMMC_DLL_CTRL); in dwcmshc_rk3568_set_clock() 223 sdhci_writel(host, 0x0, DWCMSHC_EMMC_DLL_CTRL); in dwcmshc_rk3568_set_clock() 229 sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_CTRL); in dwcmshc_rk3568_set_clock() 250 sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_TXCLK); in dwcmshc_rk3568_set_clock() 255 sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_STRBIN); in dwcmshc_rk3568_set_clock() 318 sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_TXCLK); in dwcmshc_rk3568_init() [all …]
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| A D | sdhci-xenon-phy.c | 237 sdhci_writel(host, reg, phy_regs->timing_adj); in xenon_emmc_phy_init() 353 sdhci_writel(host, reg, phy_regs->dll_ctrl); in xenon_emmc_phy_enable_dll() 408 sdhci_writel(host, reg, XENON_SLOT_OP_STATUS_CTRL); in xenon_emmc_phy_config_tuning() 422 sdhci_writel(host, reg, XENON_SLOT_EMMC_CTRL); in xenon_emmc_phy_disable_strobe() 465 sdhci_writel(host, reg, XENON_SLOT_EMMC_CTRL); in xenon_emmc_phy_strobe_delay_adj() 536 sdhci_writel(host, reg, phy_regs->timing_adj); in xenon_emmc_phy_slow_mode() 561 sdhci_writel(host, reg, phy_regs->pad_ctrl); in xenon_emmc_phy_set() 590 sdhci_writel(host, reg, phy_regs->timing_adj); in xenon_emmc_phy_set() 603 sdhci_writel(host, reg, phy_regs->pad_ctrl2); in xenon_emmc_phy_set() 630 sdhci_writel(host, reg, phy_regs->func_ctrl); in xenon_emmc_phy_set() [all …]
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| A D | sdhci-bcm-kona.c | 69 sdhci_writel(host, val, KONA_SDHOST_CORECTRL); in sdhci_bcm_kona_sd_reset() 89 sdhci_writel(host, val, KONA_SDHOST_CORECTRL); in sdhci_bcm_kona_sd_reset() 101 sdhci_writel(host, val, KONA_SDHOST_COREIMR); in sdhci_bcm_kona_sd_init() 114 sdhci_writel(host, val, KONA_SDHOST_CORECTRL); in sdhci_bcm_kona_sd_init() 149 sdhci_writel(host, val, KONA_SDHOST_CORESTAT); in sdhci_bcm_kona_sd_card_emulate() 152 sdhci_writel(host, val, KONA_SDHOST_CORESTAT); in sdhci_bcm_kona_sd_card_emulate()
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| A D | sdhci-xenon.c | 32 sdhci_writel(host, reg, SDHCI_CLOCK_CONTROL); in xenon_enable_internal_clk() 66 sdhci_writel(host, reg, XENON_SYS_OP_CTRL); in xenon_set_sdclk_off_idle() 79 sdhci_writel(host, reg, XENON_SYS_OP_CTRL); in xenon_set_acg() 90 sdhci_writel(host, reg, XENON_SYS_OP_CTRL); in xenon_enable_sdhc() 108 sdhci_writel(host, reg, XENON_SYS_OP_CTRL); in xenon_disable_sdhc() 119 sdhci_writel(host, reg, XENON_SYS_EXT_OP_CTRL); in xenon_enable_sdhc_parallel_tran() 129 sdhci_writel(host, reg, XENON_SYS_EXT_OP_CTRL); in xenon_mask_cmd_conflict_err() 146 sdhci_writel(host, reg, SDHCI_SIGNAL_ENABLE); in xenon_retune_setup() 149 sdhci_writel(host, reg, SDHCI_INT_ENABLE); in xenon_retune_setup() 401 sdhci_writel(host, reg, XENON_SYS_CFG_INFO); in xenon_enable_sdio_irq() [all …]
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| A D | sdhci-pci-gli.c | 154 sdhci_writel(host, wt_value, SDHCI_GLI_9750_WT); in gl9750_wt_on() 171 sdhci_writel(host, wt_value, SDHCI_GLI_9750_WT); in gl9750_wt_off() 237 sdhci_writel(host, pll_value, SDHCI_GLI_9750_PLL); in gli_set_9750() 238 sdhci_writel(host, misc_value, SDHCI_GLI_9750_MISC); in gli_set_9750() 283 sdhci_writel(host, misc_value, SDHCI_GLI_9750_MISC); in gli_set_9750_rx_inv() 348 sdhci_writel(host, pll, SDHCI_GLI_9750_PLL); in gl9750_disable_ssc_pll() 364 sdhci_writel(host, pll, SDHCI_GLI_9750_PLL); in gl9750_set_pll() 385 sdhci_writel(host, ssc, SDHCI_GLI_9750_PLLSSC); in gl9750_set_ssc() 386 sdhci_writel(host, pll, SDHCI_GLI_9750_PLL); in gl9750_set_ssc() 430 sdhci_writel(host, value, SDHCI_GLI_9750_CFG2); in gl9750_hw_setting() [all …]
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| A D | sdhci-sprd.c | 115 sdhci_writel(host, val, SDHCI_SPRD_REG_DEBOUNCE); in sdhci_sprd_init_config() 192 sdhci_writel(host, dll_dly_offset, SDHCI_SPRD_REG_32_DLL_DLY_OFFSET); in sdhci_sprd_set_dll_invert() 237 sdhci_writel(host, val, SDHCI_SPRD_REG_32_BUSY_POSI); in _sdhci_sprd_set_clock() 247 sdhci_writel(host, tmp, SDHCI_SPRD_REG_32_DLL_CFG); in sdhci_sprd_enable_phy_dll() 254 sdhci_writel(host, tmp, SDHCI_SPRD_REG_32_DLL_CFG); in sdhci_sprd_enable_phy_dll() 260 sdhci_writel(host, tmp, SDHCI_SPRD_REG_32_DLL_CFG); in sdhci_sprd_enable_phy_dll() 361 sdhci_writel(host, p[timing], SDHCI_SPRD_REG_32_DLL_DLY); in sdhci_sprd_set_uhs_signaling() 528 sdhci_writel(host, p[MMC_TIMING_MMC_HS400 + 1], in sdhci_sprd_hs400_enhanced_strobe()
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| A D | sdhci-tegra.c | 349 sdhci_writel(host, reg, SDHCI_TEGRA_VENDOR_CLOCK_CTRL); in tegra_sdhci_set_tap() 431 sdhci_writel(host, val, SDHCI_TEGRA_SDMEM_COMP_PADCTRL); in tegra_sdhci_configure_cal_pad() 445 sdhci_writel(host, reg, SDHCI_TEGRA_AUTO_CAL_CONFIG); in tegra_sdhci_set_pad_autocal_offset() 491 sdhci_writel(host, reg, in tegra_sdhci_set_padctrl() 553 sdhci_writel(host, reg, SDHCI_TEGRA_AUTO_CAL_CONFIG); in tegra_sdhci_pad_autocalib() 571 sdhci_writel(host, reg, SDHCI_TEGRA_AUTO_CAL_CONFIG); in tegra_sdhci_pad_autocalib() 829 sdhci_writel(host, reg, SDHCI_TEGRA_VENDOR_DLLCAL_CFG); in tegra_sdhci_hs400_dll_cal() 867 sdhci_writel(host, val, SDHCI_VNDR_TUN_CTRL0_0); in tegra_sdhci_tap_correction() 1035 sdhci_writel(host, val, SDHCI_VNDR_TUN_CTRL0_0); in tegra_sdhci_set_uhs_signaling() 1036 sdhci_writel(host, 0, SDHCI_TEGRA_VNDR_TUN_CTRL1_0); in tegra_sdhci_set_uhs_signaling() [all …]
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| A D | sdhci.c | 172 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_card_detection() 568 sdhci_writel(host, scratch, SDHCI_BUFFER); in sdhci_write_block_pio() 873 sdhci_writel(host, addr, SDHCI_DMA_ADDRESS); in sdhci_set_sdma_addr() 1644 sdhci_writel(host, cmd->arg, SDHCI_ARGUMENT); in sdhci_send_command() 2277 sdhci_writel(host, 0, SDHCI_SIGNAL_ENABLE); in sdhci_set_ios() 3704 sdhci_writel(host, 0, SDHCI_INT_ENABLE); in sdhci_suspend_host() 3926 sdhci_writel(host, mask, SDHCI_INT_STATUS); in sdhci_cqe_irq() 4782 sdhci_writel(host, 0, SDHCI_INT_ENABLE); in __sdhci_add_host() 4783 sdhci_writel(host, 0, SDHCI_SIGNAL_ENABLE); in __sdhci_add_host() 4841 sdhci_writel(host, 0, SDHCI_INT_ENABLE); in sdhci_remove_host() [all …]
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| A D | sdhci-pci-o2micro.c | 107 sdhci_writel(host, scratch32, O2_PLL_DLL_WDT_CONTROL1); in sdhci_o2_enable_internal_clock() 110 sdhci_writel(host, scratch32, O2_PLL_DLL_WDT_CONTROL1); in sdhci_o2_enable_internal_clock() 114 sdhci_writel(host, scratch32, O2_PLL_DLL_WDT_CONTROL1); in sdhci_o2_enable_internal_clock() 141 sdhci_writel(host, scratch32, O2_PLL_DLL_WDT_CONTROL1); in sdhci_o2_enable_internal_clock() 252 sdhci_writel(host, scratch_32, O2_PLL_DLL_WDT_CONTROL1); in sdhci_o2_dll_recovery() 622 sdhci_writel(host, reg, O2_SD_VENDOR_SETTING2); in sdhci_pci_o2_probe_slot()
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| A D | sdhci-of-arasan.c | 360 sdhci_writel(host, vendor, SDHCI_ARASAN_VENDOR_REGISTER); in sdhci_arasan_hs400_enhanced_strobe() 813 sdhci_writel(host, regval, SDHCI_ARASAN_OTAPDLY_REGISTER); in sdhci_versal_sdcardclk_set_phase() 816 sdhci_writel(host, regval, SDHCI_ARASAN_OTAPDLY_REGISTER); in sdhci_versal_sdcardclk_set_phase() 880 sdhci_writel(host, regval, SDHCI_ARASAN_ITAPDLY_REGISTER); in sdhci_versal_sampleclk_set_phase() 882 sdhci_writel(host, regval, SDHCI_ARASAN_ITAPDLY_REGISTER); in sdhci_versal_sampleclk_set_phase() 885 sdhci_writel(host, regval, SDHCI_ARASAN_ITAPDLY_REGISTER); in sdhci_versal_sampleclk_set_phase() 887 sdhci_writel(host, regval, SDHCI_ARASAN_ITAPDLY_REGISTER); in sdhci_versal_sampleclk_set_phase()
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| A D | sdhci-omap.c | 495 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_omap_execute_tuning() 496 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_omap_execute_tuning() 522 sdhci_writel(host, ier, SDHCI_INT_ENABLE); in sdhci_omap_card_busy() 523 sdhci_writel(host, ier, SDHCI_SIGNAL_ENABLE); in sdhci_omap_card_busy() 538 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_omap_card_busy() 539 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_omap_card_busy() 913 sdhci_writel(host, intmask & CMD_MASK, SDHCI_INT_STATUS); in sdhci_omap_irq()
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| A D | sdhci-acpi.c | 465 sdhci_writel(host, 0x3, VENDOR_SPECIFIC_PWRCTL_CLEAR_REG); in sdhci_acpi_qcom_handler() 466 sdhci_writel(host, 0x1, VENDOR_SPECIFIC_PWRCTL_CTL_REG); in sdhci_acpi_qcom_handler() 580 sdhci_writel(host, 0x40003210, SDHCI_AMD_RESET_DLL_REGISTER); in sdhci_acpi_amd_hs400_dll() 583 sdhci_writel(host, 0x40033210, SDHCI_AMD_RESET_DLL_REGISTER); in sdhci_acpi_amd_hs400_dll()
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| A D | sdhci-esdhc-mcf.c | 201 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in esdhc_mcf_reset() 202 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in esdhc_mcf_reset()
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| A D | sdhci.h | 665 static inline void sdhci_writel(struct sdhci_host *host, u32 val, int reg) in sdhci_writel() function 715 static inline void sdhci_writel(struct sdhci_host *host, u32 val, int reg) in sdhci_writel() function
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| A D | sdhci-esdhc-imx.c | 927 sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL); in esdhc_pltfm_set_clock() 955 sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL); in esdhc_pltfm_set_clock() 1289 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in esdhc_reset() 1290 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in esdhc_reset()
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| A D | sdhci-of-at91.c | 123 sdhci_writel(host, calcr | SDMMC_CALCR_ALWYSON | SDMMC_CALCR_EN, in sdhci_at91_reset()
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| A D | sdhci-pci-core.c | 634 sdhci_writel(host, val, INTEL_HS400_ES_REG); in intel_hs400_enhanced_strobe() 1003 sdhci_writel(host, glk_rx_ctrl1, GLK_RX_CTRL1); in glk_rpm_retune_wa()
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| A D | sdhci-msm.c | 2084 sdhci_writel(host, ctrl, SDHCI_INT_ENABLE); in sdhci_msm_cqe_disable() 2085 sdhci_writel(host, SDHCI_INT_RESPONSE, SDHCI_INT_STATUS); in sdhci_msm_cqe_disable()
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| /linux/ |
| A D | System.map | 46220 ffff800010c76700 t sdhci_writel 46277 ffff800010c7af90 t sdhci_writel
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| A D | .tmp_System.map | 46220 ffff800010c76700 t sdhci_writel 46277 ffff800010c7af90 t sdhci_writel
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