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Searched refs:shared_dpll (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
A Dintel_dpll_mgr.c77 shared_dpll[i] = pll->state; in intel_atomic_duplicate_dpll_state()
92 state->shared_dpll); in intel_atomic_get_shared_dpll_state()
95 return state->shared_dpll; in intel_atomic_get_shared_dpll_state()
306 &shared_dpll[i].hw_state, in intel_find_shared_dpll()
312 shared_dpll[i].pipe_mask, in intel_find_shared_dpll()
370 if (!old_crtc_state->shared_dpll) in intel_put_dpll()
390 struct intel_shared_dpll_state *shared_dpll = state->shared_dpll; in intel_shared_dpll_swap_state() local
510 crtc_state->shared_dpll = pll; in ibx_get_dpll()
1049 crtc_state->shared_dpll = pll; in hsw_get_dpll()
1764 crtc_state->shared_dpll = pll; in skl_get_dpll()
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A Dintel_ddi.c217 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in icl_pll_to_ddi_clk_sel()
1454 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in adls_ddi_enable_clock()
1498 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in rkl_ddi_enable_clock()
1542 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in dg1_ddi_enable_clock()
1608 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in icl_ddi_combo_enable_clock()
1652 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in jsl_ddi_tc_enable_clock()
1695 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in icl_ddi_tc_enable_clock()
1803 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in skl_ddi_enable_clock()
1871 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in hsw_ddi_enable_clock()
3645 crtc_state->port_clock = intel_dpll_get_freq(i915, crtc_state->shared_dpll, in intel_ddi_get_clock()
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A Dintel_display.c1610 if (crtc_state->shared_dpll == in ilk_pch_enable()
3039 if (crtc_state->shared_dpll) in get_crtc_power_domains()
4203 pipe_config->shared_dpll = NULL; in i9xx_get_pipe_config()
5073 pipe_config->shared_dpll = NULL; in ilk_get_pipe_config()
5146 pipe_config->shared_dpll = in ilk_get_pipe_config()
5148 pll = pipe_config->shared_dpll; in ilk_get_pipe_config()
5428 pipe_config->shared_dpll = NULL; in hsw_get_pipe_config()
6993 saved_state->shared_dpll = crtc_state->shared_dpll; in copy_bigjoiner_crtc_state()
7043 saved_state->shared_dpll = crtc_state->shared_dpll; in intel_crtc_prepare_cleared_state()
8197 old_crtc_state->shared_dpll != new_crtc_state->shared_dpll) { in verify_shared_dpll_state()
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A Dintel_display_types.h587 struct intel_shared_dpll_state shared_dpll[I915_NUM_PLLS]; member
1037 struct intel_shared_dpll *shared_dpll; member
A Dintel_lvds.c242 pipe_config->shared_dpll); in intel_pre_enable_lvds()
A Dintel_fdi.c797 drm_WARN_ON(&dev_priv->drm, crtc_state->shared_dpll->info->id != DPLL_ID_SPLL); in hsw_fdi_link_train()
A Dicl_dsi.c685 struct intel_shared_dpll *pll = crtc_state->shared_dpll; in gen11_dsi_map_pll()

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