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Searched refs:tRR_min (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/mtd/nand/raw/
A Dnand_timings.c58 .tRR_min = 40000,
103 .tRR_min = 20000,
147 .tRR_min = 20000,
193 .tRR_min = 20000,
238 .tRR_min = 20000,
283 .tRR_min = 20000,
330 .tRR_min = 20000,
372 .tRR_min = 20000,
414 .tRR_min = 20000,
591 spec_timings->tRR_min <= onfi_timings->tRR_min && in onfi_find_closest_sdr_mode()
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A Dpl35x-nand-controller.c624 ndelay(PSEC_TO_NSEC(sdr->tRR_min)); in pl35x_nand_read_page_hwecc()
842 val = TO_CYCLES(sdr->tRR_min, period_ns); in pl35x_nfc_setup_interface()
A Dsunxi_nand.c1452 if (timings->tRR_min > (min_clk_period * 3)) in sunxi_nfc_setup_interface()
1453 min_clk_period = DIV_ROUND_UP(timings->tRR_min, 3); in sunxi_nfc_setup_interface()
A Dnand_base.c1141 NAND_COMMON_TIMING_NS(conf, tRR_min)), in nand_sp_exec_read_page_op()
1184 NAND_COMMON_TIMING_NS(conf, tRR_min)), in nand_lp_exec_read_page_op()
1280 NAND_COMMON_TIMING_NS(conf, tRR_min)), in nand_read_param_page_op()
1950 NAND_COMMON_TIMING_NS(conf, tRR_min)), in nand_get_features_op()
A Dtegra_nand.c789 val = DIV_ROUND_UP(max3(timings->tAR_min, timings->tRR_min, in tegra_nand_setup_timing()
A Dmxc_nand.c1191 timings->tRR_min > 6 * tRC_ps || in mxc_nand_v2_setup_interface()
/linux/include/linux/mtd/
A Drawnand.h465 u32 tRR_min; member
553 u32 tRR_min; member
/linux/drivers/mtd/nand/raw/atmel/
A Dnand-controller.c1440 ncycles = DIV_ROUND_UP(conf->timings.sdr.tRR_min, mckperiodps); in atmel_smc_nand_prepare_smcconf()

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