Searched refs:timer0 (Results 1 – 25 of 79) sorted by relevance
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| /linux/Documentation/devicetree/bindings/timer/ |
| A D | ezchip,nps400-timer0.txt | 5 - compatible : should be "ezchip,nps400-timer0"
7 Clocks required for compatible = "ezchip,nps400-timer0":
14 compatible = "ezchip,nps400-timer0";
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| A D | actions,owl-timer.txt | 10 "timer0", "timer1", "timer2", "timer3"
20 interrupt-names = "timer0", "timer1";
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| A D | arm,sp804.yaml | 56 be 1 or 3 clocks. With 3 clocks, the order is timer0 clock, timer1
91 timer0: timer@fc800000 {
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| A D | oxsemi,rps-timer.txt | 12 timer0: timer@200 {
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| A D | cirrus,clps711x-timer.txt | 13 timer0 = &timer1;
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| A D | snps,arc-timer.txt | 17 timer0 {
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| A D | csky,gx6605s-timer.txt | 36 timer0: timer@20a000 {
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| A D | ingenic,tcu.yaml | 172 - const: timer0
284 clock-names = "timer0", "timer1", "timer2", "timer3",
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| A D | andestech,atcpit100-timer.txt | 27 timer0: timer@f0400000 {
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| /linux/arch/arm/boot/dts/ |
| A D | axm55xx.dtsi | 21 timer = &timer0;
147 timer0: timer@2010091000 { label
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| A D | socfpga_vt.dts | 44 timer0@ffc08000 {
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| A D | alphascale-asm9260.dtsi | 57 timer0: timer@80088000 { label
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| A D | hisi-x5hd2-dkb.dts | 44 &timer0 {
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| A D | nspire-classic.dtsi | 31 &timer0 {
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| A D | nuvoton-wpcm450.dtsi | 54 timer0: timer@b8001000 { label
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| A D | sd5203.dts | 60 timer0: timer@16002000 { label
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| /linux/arch/arc/boot/dts/ |
| A D | skeleton.dtsi | 31 timer0 {
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| A D | skeleton_hs.dtsi | 26 timer0 {
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| A D | skeleton_hs_idu.dtsi | 44 timer0 {
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| /linux/Documentation/devicetree/bindings/powerpc/fsl/ |
| A D | mpic-timer.txt | 20 timer0: timer@41100 {
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| /linux/arch/nds32/boot/dts/ |
| A D | ae3xx.dts | 57 timer0: timer@f0400000 { label
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| /linux/arch/arc/kernel/ |
| A D | setup.c | 178 cpu->extn.timer0 = timer.t0; in read_arc_build_cfg_regs()
286 IS_AVAIL1(cpu->extn.timer0, "Timer0 "), in arc_cpu_mumbojumbo()
409 if (!cpu->extn.timer0) in arc_chk_core_config()
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| /linux/drivers/clk/davinci/ |
| A D | psc-dm644x.c | 56 LPSC(27, 0, timer0, pll1_auxclk, timer0_clkdev, LPSC_ALWAYS_ENABLED),
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| A D | psc-dm646x.c | 58 LPSC(34, 0, timer0, pll1_sysclk3, timer0_clkdev, LPSC_ALWAYS_ENABLED),
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| A D | psc-dm355.c | 62 LPSC(27, 0, timer0, pll1_auxclk, timer0_clkdev, LPSC_ALWAYS_ENABLED),
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