Searched refs:vmx_set_intercept_for_msr (Results 1 – 3 of 3) sorted by relevance
| /linux/arch/x86/kvm/vmx/ |
| A D | pmu_intel.c | 629 vmx_set_intercept_for_msr(vcpu, lbr->from + i, MSR_TYPE_RW, set); in vmx_update_intercept_for_lbr_msrs()
630 vmx_set_intercept_for_msr(vcpu, lbr->to + i, MSR_TYPE_RW, set); in vmx_update_intercept_for_lbr_msrs()
632 vmx_set_intercept_for_msr(vcpu, lbr->info + i, MSR_TYPE_RW, set); in vmx_update_intercept_for_lbr_msrs()
635 vmx_set_intercept_for_msr(vcpu, MSR_LBR_SELECT, MSR_TYPE_RW, set); in vmx_update_intercept_for_lbr_msrs()
636 vmx_set_intercept_for_msr(vcpu, MSR_LBR_TOS, MSR_TYPE_RW, set); in vmx_update_intercept_for_lbr_msrs()
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| A D | vmx.h | 402 static inline void vmx_set_intercept_for_msr(struct kvm_vcpu *vcpu, u32 msr, in vmx_set_intercept_for_msr() function
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| A D | vmx.c | 3814 vmx_set_intercept_for_msr(vcpu, X2APIC_MSR(APIC_TASKPRI), MSR_TYPE_RW, in vmx_update_msr_bitmap_x2apic()
3830 vmx_set_intercept_for_msr(vcpu, MSR_IA32_RTIT_STATUS, MSR_TYPE_RW, flag); in pt_update_intercept_for_msr()
3831 vmx_set_intercept_for_msr(vcpu, MSR_IA32_RTIT_OUTPUT_BASE, MSR_TYPE_RW, flag); in pt_update_intercept_for_msr()
3832 vmx_set_intercept_for_msr(vcpu, MSR_IA32_RTIT_OUTPUT_MASK, MSR_TYPE_RW, flag); in pt_update_intercept_for_msr()
3833 vmx_set_intercept_for_msr(vcpu, MSR_IA32_RTIT_CR3_MATCH, MSR_TYPE_RW, flag); in pt_update_intercept_for_msr()
3835 vmx_set_intercept_for_msr(vcpu, MSR_IA32_RTIT_ADDR0_A + i * 2, MSR_TYPE_RW, flag); in pt_update_intercept_for_msr()
3836 vmx_set_intercept_for_msr(vcpu, MSR_IA32_RTIT_ADDR0_B + i * 2, MSR_TYPE_RW, flag); in pt_update_intercept_for_msr()
3875 vmx_set_intercept_for_msr(vcpu, msr, MSR_TYPE_R, read); in vmx_msr_filter_changed()
3876 vmx_set_intercept_for_msr(vcpu, msr, MSR_TYPE_W, write); in vmx_msr_filter_changed()
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