Home
last modified time | relevance | path

Searched refs:wa (Results 1 – 25 of 30) sorted by relevance

12

/linux/drivers/gpu/drm/i915/gt/
A Dintel_workarounds.c121 if ((wa->clr | wa_->clr) && !(wa->clr & ~wa_->clr)) { in _wa_add()
139 *wa_ = *wa; in _wa_add()
784 for (i = 0, wa = wal->list; i < wal->count; i++, wa++) { in intel_engine_emit_ctx_wa()
1305 for (i = 0, wa = wal->list; i < wal->count; i++, wa++) in wal_get_fw_for_rmw()
1317 if ((cur ^ wa->set) & wa->read) { in wa_verify()
1320 cur, cur & wa->read, wa->set & wa->read); in wa_verify()
1345 for (i = 0, wa = wal->list; i < wal->count; i++, wa++) { in wa_list_apply()
1350 val = (old & ~wa->clr) | wa->set; in wa_list_apply()
1355 wa_verify(wa, intel_gt_read_register_fw(gt, wa->reg), in wa_list_apply()
1384 for (i = 0, wa = wal->list; i < wal->count; i++, wa++) in wa_list_verify()
[all …]
A Dselftest_workarounds.c1056 const struct i915_wa *wa = &engine->whitelist.list[i]; in check_whitelisted_registers() local
1058 if (i915_mmio_reg_offset(wa->reg) & in check_whitelisted_registers()
1062 if (!fn(engine, a[i], b[i], wa->reg)) in check_whitelisted_registers()
/linux/drivers/crypto/ccp/
A Dccp-ops.c67 dma_unmap_sg(wa->dma_dev, wa->dma_sg_head, wa->nents, wa->dma_dir); in ccp_sg_free()
76 memset(wa, 0, sizeof(*wa)); in ccp_init_sg_workarea()
78 wa->sg = sg; in ccp_init_sg_workarea()
116 if (wa->sg_used == sg_dma_len(wa->dma_sg)) { in ccp_update_sg_workarea()
118 wa->dma_sg = sg_next(wa->dma_sg); in ccp_update_sg_workarea()
128 wa->sg = sg_next(wa->sg); in ccp_update_sg_workarea()
139 dma_pool_free(wa->dma_pool, wa->address, in ccp_dm_free()
143 dma_unmap_single(wa->dev, wa->dma.address, wa->length, in ccp_dm_free()
157 memset(wa, 0, sizeof(*wa)); in ccp_init_dm_workarea()
180 wa->dma.address = dma_map_single(wa->dev, wa->address, len, in ccp_init_dm_workarea()
[all …]
/linux/scripts/
A Dkallsyms.c698 int wa, wb; in compare_symbols() local
707 wa = (sa->sym[0] == 'w') || (sa->sym[0] == 'W'); in compare_symbols()
709 if (wa != wb) in compare_symbols()
710 return wa - wb; in compare_symbols()
713 wa = may_be_linker_script_provide_symbol(sa); in compare_symbols()
715 if (wa != wb) in compare_symbols()
716 return wa - wb; in compare_symbols()
719 wa = strspn(sym_name(sa), "_"); in compare_symbols()
721 if (wa != wb) in compare_symbols()
722 return wa - wb; in compare_symbols()
/linux/drivers/clocksource/
A Darm_arch_timer.c508 return of_property_read_bool(np, wa->id); in arch_timer_check_dt_erratum()
515 return this_cpu_has_cap((uintptr_t)wa->id); in arch_timer_check_local_cap_erratum()
524 const struct ate_acpi_oem_info *info = wa->id; in arch_timer_check_acpi_oem_erratum()
571 if (wa->read_cntvct_el0 || wa->read_cntpct_el0) in arch_timer_enable_workaround()
580 if (wa->read_cntvct_el0) { in arch_timer_enable_workaround()
612 wa = arch_timer_iterate_errata(type, match_fn, arg); in arch_timer_check_ool_workaround()
613 if (!wa) in arch_timer_check_ool_workaround()
617 if (__wa && wa != __wa) in arch_timer_check_ool_workaround()
619 wa->desc, __wa->desc); in arch_timer_check_ool_workaround()
624 arch_timer_enable_workaround(wa, local); in arch_timer_check_ool_workaround()
[all …]
/linux/drivers/staging/media/zoran/
A Dzoran_device.c233 unsigned int wa, we, ha, he; in zr36057_set_vfe() local
239 wa = tvn->wa; in zr36057_set_vfe()
246 video_width > wa || video_height > ha) { in zr36057_set_vfe()
255 X = DIV_ROUND_UP(vid_win_wid * 64, tvn->wa); in zr36057_set_vfe()
258 hcrop1 = 2 * ((tvn->wa - we) / 4); in zr36057_set_vfe()
259 hcrop2 = tvn->wa - we - hcrop1; in zr36057_set_vfe()
269 h_end = h_start + tvn->wa - 1; in zr36057_set_vfe()
A Dvideocodec.h221 u16 wt, wa, h_start, h_sync_start, ht, ha, v_start; member
A Dzoran.h48 #define BUZ_MAX_WIDTH (zr->timing->wa)
A Dzr36060.c572 reg += norm->wa; /* BHend */ in zr36060_set_video()
606 reg += norm->wa + 8; /* SHend */ in zr36060_set_video()
/linux/drivers/gpu/drm/i915/gt/uc/
A Dintel_guc_ads.c249 struct i915_wa *wa; in guc_mmio_regset_init() local
258 for (i = 0, wa = wal->list; i < wal->count; i++, wa++) in guc_mmio_regset_init()
259 GUC_MMIO_REG_ADD(regset, wa->reg, wa->masked_reg); in guc_mmio_regset_init()
/linux/drivers/gpu/drm/i915/
A Di915_debugfs.c536 const struct i915_wa *wa; in i915_wa_registers() local
546 for (wa = wal->list; count--; wa++) in i915_wa_registers()
548 i915_mmio_reg_offset(wa->reg), in i915_wa_registers()
549 wa->set, wa->clr); in i915_wa_registers()
/linux/drivers/net/wireless/broadcom/b43/
A DMakefile4 b43-$(CONFIG_B43_PHY_G) += phy_g.o tables.o lo.o wa.o
/linux/drivers/gpu/drm/amd/display/dc/dce/
A Ddce_mem_input.c756 if (dce_mi->wa.single_head_rdreq_dmif_limit) { in dce_mi_allocate_dmif()
758 dce_mi->wa.single_head_rdreq_dmif_limit; in dce_mi_allocate_dmif()
786 if (dce_mi->wa.single_head_rdreq_dmif_limit) { in dce_mi_free_dmif()
788 dce_mi->wa.single_head_rdreq_dmif_limit; in dce_mi_free_dmif()
A Ddce_hwseq.c80 if (hws->wa.blnd_crtc_trigger) { in dce_pipe_control_lock()
A Ddce_mem_input.h429 struct dce_mem_input_wa wa; member
/linux/drivers/gpu/drm/amd/display/dc/
A Ddc_ddc_types.h156 union ddc_wa wa; member
/linux/drivers/gpu/drm/amd/display/dc/inc/
A Dhw_sequencer_private.h154 struct dce_hwseq_wa wa; member
/linux/arch/arm/mm/
A Dcache-l2x0-pmu.c374 L220_PLUS_EVENT_ATTR(wa, 0x9),
/linux/drivers/gpu/drm/amd/display/dc/dcn10/
A Ddcn10_resource.c927 hws->wa.DEGVIDCN10_253 = true; in dcn10_hwseq_create()
928 hws->wa.false_optc_underflow = true; in dcn10_hwseq_create()
929 hws->wa.DEGVIDCN10_254 = true; in dcn10_hwseq_create()
/linux/drivers/gpu/drm/amd/display/dc/core/
A Ddc_link_ddc.c228 ddc_service->wa.raw = 0; in ddc_service_construct()
/linux/drivers/gpu/drm/amd/display/dc/dce110/
A Ddce110_resource.c571 hws->wa.blnd_crtc_trigger = true; in dce110_hwseq_create()
617 dce_mi->wa.single_head_rdreq_dmif_limit = 3; in dce110_mem_input_create()
/linux/drivers/gpu/drm/amd/display/dc/dce100/
A Ddce100_resource.c569 dce_mi->wa.single_head_rdreq_dmif_limit = 2; in dce100_mem_input_create()
/linux/drivers/gpu/drm/amd/display/dc/dcn21/
A Ddcn21_resource.c1725 hws->wa.DEGVIDCN21 = true; in dcn21_hwseq_create()
1726 hws->wa.disallow_self_refresh_during_multi_plane_transition = true; in dcn21_hwseq_create()
/linux/Documentation/driver-api/thermal/
A Dintel_powerclamp.rst302 Cpu(s): 71.2%us, 4.7%sy, 0.0%ni, 24.1%id, 0.0%wa, 0.0%hi, 0.0%si, 0.0%st
/linux/drivers/gpu/drm/amd/display/dc/dce60/
A Ddce60_resource.c679 dce_mi->wa.single_head_rdreq_dmif_limit = 2; in dce60_mem_input_create()

Completed in 60 milliseconds

12