Searched refs:x5 (Results 1 – 25 of 296) sorted by relevance

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/linux/arch/arm/boot/dts/
A D	imx51-apf51dev.dts	184 MX51_PAD_DISP1_DAT0__DISP1_DAT0 0x5 185 MX51_PAD_DISP1_DAT1__DISP1_DAT1 0x5 186 MX51_PAD_DISP1_DAT2__DISP1_DAT2 0x5 187 MX51_PAD_DISP1_DAT3__DISP1_DAT3 0x5 188 MX51_PAD_DISP1_DAT4__DISP1_DAT4 0x5 189 MX51_PAD_DISP1_DAT5__DISP1_DAT5 0x5 190 MX51_PAD_DISP1_DAT6__DISP1_DAT6 0x5 191 MX51_PAD_DISP1_DAT7__DISP1_DAT7 0x5 192 MX51_PAD_DISP1_DAT8__DISP1_DAT8 0x5 208 MX51_PAD_DI1_PIN2__DI1_PIN2 0x5 [all …]
A D	imx53-m53evk.dts	253 MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0 0x5 254 MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1 0x5 255 MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2 0x5 278 MX53_PAD_EIM_DA13__IPU_DI1_D0_CS 0x5 279 MX53_PAD_EIM_DA14__IPU_DI1_D1_CS 0x5 280 MX53_PAD_EIM_DA15__IPU_DI1_PIN1 0x5 281 MX53_PAD_EIM_DA11__IPU_DI1_PIN2 0x5 282 MX53_PAD_EIM_DA12__IPU_DI1_PIN3 0x5 283 MX53_PAD_EIM_A25__IPU_DI1_PIN12 0x5 284 MX53_PAD_EIM_DA10__IPU_DI1_PIN15 0x5 [all …]
A D	imx53-cx9020.dts	256 MX53_PAD_DI0_PIN15__IPU_DI0_PIN15 0x5 257 MX53_PAD_DI0_PIN2__IPU_DI0_PIN2 0x5 258 MX53_PAD_DI0_PIN3__IPU_DI0_PIN3 0x5 259 MX53_PAD_DI0_PIN4__IPU_DI0_PIN4 0x5 260 MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0 0x5 261 MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1 0x5 262 MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2 0x5 263 MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3 0x5 264 MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4 0x5 265 MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5 0x5 [all …]
A D	imx51-ts4800.dts	262 MX51_PAD_DISP1_DAT0__DISP1_DAT0 0x5 263 MX51_PAD_DISP1_DAT1__DISP1_DAT1 0x5 264 MX51_PAD_DISP1_DAT2__DISP1_DAT2 0x5 265 MX51_PAD_DISP1_DAT3__DISP1_DAT3 0x5 266 MX51_PAD_DISP1_DAT4__DISP1_DAT4 0x5 267 MX51_PAD_DISP1_DAT5__DISP1_DAT5 0x5 268 MX51_PAD_DISP1_DAT6__DISP1_DAT6 0x5 269 MX51_PAD_DISP1_DAT7__DISP1_DAT7 0x5 286 MX51_PAD_DI1_PIN2__DI1_PIN2 0x5 287 MX51_PAD_DI1_PIN3__DI1_PIN3 0x5 [all …]
A D	imx51-babbage.dts	574 MX51_PAD_EIM_A27__GPIO2_21 0x5 600 MX51_PAD_DISP1_DAT0__DISP1_DAT0 0x5 601 MX51_PAD_DISP1_DAT1__DISP1_DAT1 0x5 602 MX51_PAD_DISP1_DAT2__DISP1_DAT2 0x5 603 MX51_PAD_DISP1_DAT3__DISP1_DAT3 0x5 604 MX51_PAD_DISP1_DAT4__DISP1_DAT4 0x5 624 MX51_PAD_DI1_PIN2__DI1_PIN2 0x5 625 MX51_PAD_DI1_PIN3__DI1_PIN3 0x5 647 MX51_PAD_DI2_PIN2__DI2_PIN2 0x5 648 MX51_PAD_DI2_PIN3__DI2_PIN3 0x5 [all …]
A D	imx53-qsb-common.dtsi	265 MX53_PAD_DI0_PIN15__IPU_DI0_PIN15 0x5 266 MX53_PAD_DI0_PIN2__IPU_DI0_PIN2 0x5 267 MX53_PAD_DI0_PIN3__IPU_DI0_PIN3 0x5 268 MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0 0x5 269 MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1 0x5 270 MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2 0x5 271 MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3 0x5 272 MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4 0x5 273 MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5 0x5 274 MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6 0x5 [all …]
A D	imx53-tx53-x03x.dts	290 MX53_PAD_DI0_PIN15__IPU_DI0_PIN15 0x5 291 MX53_PAD_DI0_PIN2__IPU_DI0_PIN2 0x5 292 MX53_PAD_DI0_PIN3__IPU_DI0_PIN3 0x5 293 MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0 0x5 294 MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1 0x5 295 MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2 0x5 296 MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3 0x5 297 MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4 0x5 298 MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5 0x5 299 MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6 0x5 [all …]
A D	imx51-zii-rdu1.dts	750 MX51_PAD_DISP1_DAT0__DISP1_DAT0 0x5 751 MX51_PAD_DISP1_DAT1__DISP1_DAT1 0x5 752 MX51_PAD_DISP1_DAT2__DISP1_DAT2 0x5 753 MX51_PAD_DISP1_DAT3__DISP1_DAT3 0x5 754 MX51_PAD_DISP1_DAT4__DISP1_DAT4 0x5 755 MX51_PAD_DISP1_DAT5__DISP1_DAT5 0x5 756 MX51_PAD_DISP1_DAT6__DISP1_DAT6 0x5 757 MX51_PAD_DISP1_DAT7__DISP1_DAT7 0x5 758 MX51_PAD_DISP1_DAT8__DISP1_DAT8 0x5 774 MX51_PAD_DI1_PIN2__DI1_PIN2 0x5 [all …]
/linux/arch/powerpc/boot/dts/fsl/
A D	mpc8568mds.dts	31 0x5 0x0 0xf8010000 0x00008000>; 52 reg = <0x5 0x1>; 156 0x5 0xa 0x1 0x0 0x2 0x0 /* TxD0 */ 157 0x5 0x9 0x1 0x0 0x2 0x0 /* TxD1 */ 158 0x5 0x8 0x1 0x0 0x2 0x0 /* TxD2 */ 159 0x5 0x7 0x1 0x0 0x2 0x0 /* TxD3 */ 164 0x5 0xf 0x2 0x0 0x2 0x0 /* RxD0 */ 165 0x5 0xe 0x2 0x0 0x2 0x0 /* RxD1 */ 180 0x4 0x5 0x1 0x0 0x2 0x0>; /* MDC */ 258 0x9000 0x0 0x0 0x1 &mpic 0x5 0x1 0 0 [all …]
/linux/arch/x86/crypto/
A D	glue_helper-asm-avx.S	8 #define load_8way(src, x0, x1, x2, x3, x4, x5, x6, x7) \ argument 14 vmovdqu (5*16)(src), x5; \ 18 #define store_8way(dst, x0, x1, x2, x3, x4, x5, x6, x7) \ argument 24 vmovdqu x5, (5*16)(dst); \ 28 #define store_cbc_8way(src, dst, x0, x1, x2, x3, x4, x5, x6, x7) \ argument 33 vpxor (4*16)(src), x5, x5; \ 36 store_8way(dst, x0, x1, x2, x3, x4, x5, x6, x7);
A D	glue_helper-asm-avx2.S	8 #define load_16way(src, x0, x1, x2, x3, x4, x5, x6, x7) \ argument 14 vmovdqu (5*32)(src), x5; \ 18 #define store_16way(dst, x0, x1, x2, x3, x4, x5, x6, x7) \ argument 24 vmovdqu x5, (5*32)(dst); \ 28 #define store_cbc_16way(src, dst, x0, x1, x2, x3, x4, x5, x6, x7, t0) \ argument 36 vpxor (4*32+16)(src), x5, x5; \ 39 store_16way(dst, x0, x1, x2, x3, x4, x5, x6, x7);
A D	camellia-aesni-avx-asm_64.S	66 vpshufb t4, x5, x5; \ 93 vaesenclast t4, x5, x5; \ 134 vpxor x5, x0, x0; \ 140 vpxor x3, x5, x5; \ 146 vpxor x5, x2, x2; \ 150 vpxor x0, x5, x5; \ 161 vpxor t2, x5, x5; \ 162 vpxor 1 * 16(mem_cd), x5, x5; \ 218 vmovdqu x5, 1 * 16(mem_cd); \ 548 vpxor x0, x5, x5; \ [all …]
A D	camellia-aesni-avx2-asm_64.S	80 vpshufb t4, x5, x5; \ 123 vaesenclast t4##_x, x5##_x, x5##_x; \ 125 vinserti128 $1, t5##_x, x5, x5; \ 160 vpxor x5, x0, x0; \ 172 vpxor x3, x5, x5; \ 182 vpxor x5, x2, x2; \ 186 vpxor x0, x5, x5; \ 211 vpxor t2, x5, x5; \ 212 vpxor 1 * 32(mem_cd), x5, x5; \ 582 vpxor x0, x5, x5; \ [all …]
/linux/tools/testing/selftests/arm64/fp/
A D	sve-test.S	116 mov x5, x0 121 mov x1, x5 137 mov x5, x0 142 mov x1, x5 193 mov x5, #0 196 add x5, x5, #1 227 mov x0, x5 252 mov x0, x5 267 lsr x5, x5, #3 270 mov x1, x5 [all …]
A D	fpsimd-test.S	82 mov x5, x0 87 mov x1, x5 100 mov x5, #0 101 0: ldrb w3, [x0, x5] 102 ldrb w4, [x1, x5] 103 add x5, x5, #1 118 _adrv x5, x0, 6 130 mov x0, x5 181 mov x5, x1 191 str x5, [x1, #sa_handler]
A D	asm-utils.S	78 mov x5, x30 84 ret x5 118 mov x5, x1 120 0: subs x5, x5, #1
/linux/arch/arm64/crypto/
A D	aes-neonbs-core.S	133 eor \x5, \x5, \t1 233 eor \x5\().16b, \x5\().16b, v21.16b 244 tbl \x5\().16b, {\x5\().16b}, \mask\().16b 263 eor \x5\().16b, \x5\().16b, \t5\().16b 279 ext \t1\().16b, \x5\().16b, \x5\().16b, #8 292 eor \x5\().16b, \x5\().16b, \t7\().16b 297 eor \x5\().16b, \x5\().16b, \t7\().16b 331 eor \x5\().16b, \x5\().16b, \t3\().16b 335 eor \x5\().16b, \x5\().16b, \t7\().16b 574 lsl x5, x5, x23 [all …]
/linux/arch/arm64/kernel/
A D	head.S	299 mov x5, #52 302 mov x5, #VA_BITS_MIN 305 str x5, [x6] 321 adrp x5, __idmap_text_end 322 clz x5, x5 327 str x5, [x6] 354 str_l x4, idmap_ptrs_per_pgd, x5 367 add x5, x5, x23 // add KASLR displacement 427 init_cpu_task x4, x5, x6 647 adr_l x5, vectors [all …]
/linux/arch/arm64/lib/
A D	crc32.S	26 ldp x5, x6, [x8] 29 CPU_BE( rev x5, x5 ) 50 crc32\c\()x w8, w0, x5 57 ldp x5, x6, [x1, #-16] 60 CPU_BE( rev x5, x5 ) 64 crc32\c\()x w0, w0, x5
A D	mte.S	67 multitag_transfer_size x5, x6 70 add x2, x2, x5 71 add x3, x3, x5 134 multitag_transfer_size x7, x5 138 ldgm x5, [x0] 139 orr x2, x2, x5 158 multitag_transfer_size x7, x5
/linux/arch/arm/crypto/
A D	aes-neonbs-core.S	188 veor \x5, \x5, \t1 291 __tbl \x5, \x5, \mask, \t1 307 vext.8 \t5, \x5, \x5, #12 310 veor \x5, \x5, \t5 326 vext.8 \t1, \x5, \x5, #8 339 veor \x5, \x5, \t7 344 veor \x5, \x5, \t7 364 veor \x5, \x5, \t5 379 vext.8 \t5, \x5, \x5, #8 391 veor \x5, \x5, \t3 [all …]
/linux/drivers/gpu/drm/vmwgfx/
A D	vmwgfx_msg_arm64.h	60 register u64 x5 asm("x5") = in_di; in vmw_port() 69 "+r"(x3), "+r"(x4), "+r"(x5) in vmw_port() 77 *di = x5; in vmw_port() 93 register u64 x5 asm("x5") = in_di; in vmw_port_hb() 102 "+r"(x3), "+r"(x4), "+r"(x5) in vmw_port_hb() 110 *di = x5; in vmw_port_hb()
/linux/arch/arm64/kvm/hyp/nvhe/
A D	host.S	27 stp x4, x5, [x0, #CPU_XREG_OFFSET(4)] 46 ldp x4, x5, [x29, #CPU_XREG_OFFSET(4)] 104 get_vcpu_ptr x5, x6 134 ldr x5, =__kvm_handle_stub_hvc 135 hyp_pa x5, x6 136 br x5 227 ldp x4, x5, [x18, #CPU_XREG_OFFSET(4)] 239 stp x4, x5, [x18, #CPU_XREG_OFFSET(4)]
A D	hyp-init.S	223 mov_q x5, INIT_SCTLR_EL2_MMU_OFF 225 msr sctlr_el2, x5 229 mov_q x5, HCR_HOST_NVHE_FLAGS 230 msr hcr_el2, x5 234 adr_l x5, __hyp_stub_vectors 235 msr vbar_el2, x5
/linux/arch/arm64/kvm/hyp/
A D	entry.S	71 ldp x4, x5, [x29, #CPU_XREG_OFFSET(4)] 126 stp x4, x5, [x1, #CPU_XREG_OFFSET(4)] 147 ptrauth_switch_to_hyp x1, x2, x3, x4, x5 186 mov x5, x0 213 orr x0, x0, x5

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Last Index update Fri Sep 05 17:56:23 CST 2025