1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (c) 2014 MediaTek Inc.
4 * Author: Eddie Huang <eddie.huang@mediatek.com>
5 */
6
7/dts-v1/;
8#include <dt-bindings/gpio/gpio.h>
9#include "mt8173.dtsi"
10
11/ {
12	model = "MediaTek MT8173 evaluation board";
13	compatible = "mediatek,mt8173-evb", "mediatek,mt8173";
14
15	aliases {
16		serial0 = &uart0;
17		serial1 = &uart1;
18		serial2 = &uart2;
19		serial3 = &uart3;
20	};
21
22	memory@40000000 {
23		device_type = "memory";
24		reg = <0 0x40000000 0 0x80000000>;
25	};
26
27	chosen { };
28
29	connector {
30		compatible = "hdmi-connector";
31		label = "hdmi";
32		type = "d";
33
34		port {
35			hdmi_connector_in: endpoint {
36				remote-endpoint = <&hdmi0_out>;
37			};
38		};
39	};
40
41	extcon_usb: extcon_iddig {
42		compatible = "linux,extcon-usb-gpio";
43		id-gpio = <&pio 16 GPIO_ACTIVE_HIGH>;
44	};
45
46	usb_p1_vbus: regulator@0 {
47		compatible = "regulator-fixed";
48		regulator-name = "usb_vbus";
49		regulator-min-microvolt = <5000000>;
50		regulator-max-microvolt = <5000000>;
51		gpio = <&pio 130 GPIO_ACTIVE_HIGH>;
52		enable-active-high;
53	};
54
55	usb_p0_vbus: regulator@1 {
56		compatible = "regulator-fixed";
57		regulator-name = "vbus";
58		regulator-min-microvolt = <5000000>;
59		regulator-max-microvolt = <5000000>;
60		gpio = <&pio 9 GPIO_ACTIVE_HIGH>;
61		enable-active-high;
62	};
63
64	firmware {
65		optee {
66			compatible = "linaro,optee-tz";
67			method = "smc";
68		};
69	};
70};
71
72&mfg_async {
73	domain-supply = <&da9211_vgpu_reg>;
74};
75
76&cec {
77	status = "okay";
78};
79
80&cpu0 {
81	proc-supply = <&mt6397_vpca15_reg>;
82};
83
84&cpu1 {
85	proc-supply = <&mt6397_vpca15_reg>;
86};
87
88&cpu2 {
89	proc-supply = <&da9211_vcpu_reg>;
90	sram-supply = <&mt6397_vsramca7_reg>;
91};
92
93&cpu3 {
94	proc-supply = <&da9211_vcpu_reg>;
95	sram-supply = <&mt6397_vsramca7_reg>;
96};
97
98&dpi0 {
99	status = "okay";
100};
101
102&hdmi_phy {
103	status = "okay";
104};
105
106&hdmi0 {
107	status = "okay";
108
109	ports {
110		port@1 {
111			reg = <1>;
112
113			hdmi0_out: endpoint {
114				remote-endpoint = <&hdmi_connector_in>;
115			};
116		};
117	};
118};
119
120&i2c1 {
121	status = "okay";
122
123	buck: da9211@68 {
124		compatible = "dlg,da9211";
125		reg = <0x68>;
126
127		regulators {
128			da9211_vcpu_reg: BUCKA {
129				regulator-name = "VBUCKA";
130				regulator-min-microvolt = < 700000>;
131				regulator-max-microvolt = <1310000>;
132				regulator-min-microamp	= <2000000>;
133				regulator-max-microamp	= <4400000>;
134				regulator-ramp-delay = <10000>;
135				regulator-always-on;
136			};
137
138			da9211_vgpu_reg: BUCKB {
139				regulator-name = "VBUCKB";
140				regulator-min-microvolt = < 700000>;
141				regulator-max-microvolt = <1310000>;
142				regulator-min-microamp	= <2000000>;
143				regulator-max-microamp	= <3000000>;
144				regulator-ramp-delay = <10000>;
145			};
146		};
147	};
148};
149
150&mmc0 {
151	status = "okay";
152	pinctrl-names = "default", "state_uhs";
153	pinctrl-0 = <&mmc0_pins_default>;
154	pinctrl-1 = <&mmc0_pins_uhs>;
155	bus-width = <8>;
156	max-frequency = <50000000>;
157	cap-mmc-highspeed;
158	mediatek,hs200-cmd-int-delay=<26>;
159	mediatek,hs400-cmd-int-delay=<14>;
160	mediatek,hs400-cmd-resp-sel-rising;
161	vmmc-supply = <&mt6397_vemc_3v3_reg>;
162	vqmmc-supply = <&mt6397_vio18_reg>;
163	non-removable;
164};
165
166&mmc1 {
167	status = "okay";
168	pinctrl-names = "default", "state_uhs";
169	pinctrl-0 = <&mmc1_pins_default>;
170	pinctrl-1 = <&mmc1_pins_uhs>;
171	bus-width = <4>;
172	max-frequency = <50000000>;
173	cap-sd-highspeed;
174	sd-uhs-sdr25;
175	cd-gpios = <&pio 132 0>;
176	vmmc-supply = <&mt6397_vmch_reg>;
177	vqmmc-supply = <&mt6397_vmc_reg>;
178};
179
180&pio {
181	disp_pwm0_pins: disp_pwm0_pins {
182		pins1 {
183			pinmux = <MT8173_PIN_87_DISP_PWM0__FUNC_DISP_PWM0>;
184			output-low;
185		};
186	};
187
188	mmc0_pins_default: mmc0default {
189		pins_cmd_dat {
190			pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
191				 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
192				 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
193				 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
194				 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
195				 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
196				 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
197				 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
198				 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
199			input-enable;
200			bias-pull-up;
201		};
202
203		pins_clk {
204			pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
205			bias-pull-down;
206		};
207
208		pins_rst {
209			pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
210			bias-pull-up;
211		};
212	};
213
214	mmc1_pins_default: mmc1default {
215		pins_cmd_dat {
216			pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
217				 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
218				 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
219				 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
220				 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
221			input-enable;
222			drive-strength = <MTK_DRIVE_4mA>;
223			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
224		};
225
226		pins_clk {
227			pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
228			bias-pull-down;
229			drive-strength = <MTK_DRIVE_4mA>;
230		};
231
232		pins_insert {
233			pinmux = <MT8173_PIN_132_I2S0_DATA1__FUNC_GPIO132>;
234			bias-pull-up;
235		};
236	};
237
238	mmc0_pins_uhs: mmc0 {
239		pins_cmd_dat {
240			pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
241				 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
242				 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
243				 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
244				 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
245				 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
246				 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
247				 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
248				 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
249			input-enable;
250			drive-strength = <MTK_DRIVE_2mA>;
251			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
252		};
253
254		pins_clk {
255			pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
256			drive-strength = <MTK_DRIVE_2mA>;
257			bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
258		};
259
260		pins_rst {
261			pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
262			bias-pull-up;
263		};
264	};
265
266	mmc1_pins_uhs: mmc1 {
267		pins_cmd_dat {
268			pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
269				 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
270				 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
271				 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
272				 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
273			input-enable;
274			drive-strength = <MTK_DRIVE_4mA>;
275			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
276		};
277
278		pins_clk {
279			pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
280			drive-strength = <MTK_DRIVE_4mA>;
281			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
282		};
283	};
284
285	usb_id_pins_float: usb_iddig_pull_up {
286		pins_iddig {
287			pinmux = <MT8173_PIN_16_IDDIG__FUNC_IDDIG>;
288			bias-pull-up;
289		};
290	};
291
292	usb_id_pins_ground: usb_iddig_pull_down {
293		pins_iddig {
294			pinmux = <MT8173_PIN_16_IDDIG__FUNC_IDDIG>;
295			bias-pull-down;
296		};
297	};
298};
299
300&pwm0 {
301	pinctrl-names = "default";
302	pinctrl-0 = <&disp_pwm0_pins>;
303	status = "okay";
304};
305
306&pwrap {
307	/* Only MT8173 E1 needs USB power domain */
308	power-domains = <&spm MT8173_POWER_DOMAIN_USB>;
309
310	pmic: mt6397 {
311		compatible = "mediatek,mt6397";
312		interrupt-parent = <&pio>;
313		interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
314		interrupt-controller;
315		#interrupt-cells = <2>;
316
317		mt6397regulator: mt6397regulator {
318			compatible = "mediatek,mt6397-regulator";
319
320			mt6397_vpca15_reg: buck_vpca15 {
321				regulator-compatible = "buck_vpca15";
322				regulator-name = "vpca15";
323				regulator-min-microvolt = < 700000>;
324				regulator-max-microvolt = <1350000>;
325				regulator-ramp-delay = <12500>;
326				regulator-always-on;
327			};
328
329			mt6397_vpca7_reg: buck_vpca7 {
330				regulator-compatible = "buck_vpca7";
331				regulator-name = "vpca7";
332				regulator-min-microvolt = < 700000>;
333				regulator-max-microvolt = <1350000>;
334				regulator-ramp-delay = <12500>;
335				regulator-enable-ramp-delay = <115>;
336			};
337
338			mt6397_vsramca15_reg: buck_vsramca15 {
339				regulator-compatible = "buck_vsramca15";
340				regulator-name = "vsramca15";
341				regulator-min-microvolt = < 700000>;
342				regulator-max-microvolt = <1350000>;
343				regulator-ramp-delay = <12500>;
344				regulator-always-on;
345			};
346
347			mt6397_vsramca7_reg: buck_vsramca7 {
348				regulator-compatible = "buck_vsramca7";
349				regulator-name = "vsramca7";
350				regulator-min-microvolt = < 700000>;
351				regulator-max-microvolt = <1350000>;
352				regulator-ramp-delay = <12500>;
353				regulator-always-on;
354			};
355
356			mt6397_vcore_reg: buck_vcore {
357				regulator-compatible = "buck_vcore";
358				regulator-name = "vcore";
359				regulator-min-microvolt = < 700000>;
360				regulator-max-microvolt = <1350000>;
361				regulator-ramp-delay = <12500>;
362				regulator-always-on;
363			};
364
365			mt6397_vgpu_reg: buck_vgpu {
366				regulator-compatible = "buck_vgpu";
367				regulator-name = "vgpu";
368				regulator-min-microvolt = < 700000>;
369				regulator-max-microvolt = <1350000>;
370				regulator-ramp-delay = <12500>;
371				regulator-enable-ramp-delay = <115>;
372			};
373
374			mt6397_vdrm_reg: buck_vdrm {
375				regulator-compatible = "buck_vdrm";
376				regulator-name = "vdrm";
377				regulator-min-microvolt = <1200000>;
378				regulator-max-microvolt = <1400000>;
379				regulator-ramp-delay = <12500>;
380				regulator-always-on;
381			};
382
383			mt6397_vio18_reg: buck_vio18 {
384				regulator-compatible = "buck_vio18";
385				regulator-name = "vio18";
386				regulator-min-microvolt = <1620000>;
387				regulator-max-microvolt = <1980000>;
388				regulator-ramp-delay = <12500>;
389				regulator-always-on;
390			};
391
392			mt6397_vtcxo_reg: ldo_vtcxo {
393				regulator-compatible = "ldo_vtcxo";
394				regulator-name = "vtcxo";
395				regulator-always-on;
396			};
397
398			mt6397_va28_reg: ldo_va28 {
399				regulator-compatible = "ldo_va28";
400				regulator-name = "va28";
401				regulator-always-on;
402			};
403
404			mt6397_vcama_reg: ldo_vcama {
405				regulator-compatible = "ldo_vcama";
406				regulator-name = "vcama";
407				regulator-min-microvolt = <1500000>;
408				regulator-max-microvolt = <2800000>;
409				regulator-enable-ramp-delay = <218>;
410			};
411
412			mt6397_vio28_reg: ldo_vio28 {
413				regulator-compatible = "ldo_vio28";
414				regulator-name = "vio28";
415				regulator-always-on;
416			};
417
418			mt6397_vusb_reg: ldo_vusb {
419				regulator-compatible = "ldo_vusb";
420				regulator-name = "vusb";
421			};
422
423			mt6397_vmc_reg: ldo_vmc {
424				regulator-compatible = "ldo_vmc";
425				regulator-name = "vmc";
426				regulator-min-microvolt = <1800000>;
427				regulator-max-microvolt = <3300000>;
428				regulator-enable-ramp-delay = <218>;
429			};
430
431			mt6397_vmch_reg: ldo_vmch {
432				regulator-compatible = "ldo_vmch";
433				regulator-name = "vmch";
434				regulator-min-microvolt = <3000000>;
435				regulator-max-microvolt = <3300000>;
436				regulator-enable-ramp-delay = <218>;
437			};
438
439			mt6397_vemc_3v3_reg: ldo_vemc3v3 {
440				regulator-compatible = "ldo_vemc3v3";
441				regulator-name = "vemc_3v3";
442				regulator-min-microvolt = <3000000>;
443				regulator-max-microvolt = <3300000>;
444				regulator-enable-ramp-delay = <218>;
445			};
446
447			mt6397_vgp1_reg: ldo_vgp1 {
448				regulator-compatible = "ldo_vgp1";
449				regulator-name = "vcamd";
450				regulator-min-microvolt = <1220000>;
451				regulator-max-microvolt = <3300000>;
452				regulator-enable-ramp-delay = <240>;
453			};
454
455			mt6397_vgp2_reg: ldo_vgp2 {
456				regulator-compatible = "ldo_vgp2";
457				regulator-name = "vcamio";
458				regulator-min-microvolt = <1000000>;
459				regulator-max-microvolt = <3300000>;
460				regulator-enable-ramp-delay = <218>;
461			};
462
463			mt6397_vgp3_reg: ldo_vgp3 {
464				regulator-compatible = "ldo_vgp3";
465				regulator-name = "vcamaf";
466				regulator-min-microvolt = <1200000>;
467				regulator-max-microvolt = <3300000>;
468				regulator-enable-ramp-delay = <218>;
469			};
470
471			mt6397_vgp4_reg: ldo_vgp4 {
472				regulator-compatible = "ldo_vgp4";
473				regulator-name = "vgp4";
474				regulator-min-microvolt = <1200000>;
475				regulator-max-microvolt = <3300000>;
476				regulator-enable-ramp-delay = <218>;
477			};
478
479			mt6397_vgp5_reg: ldo_vgp5 {
480				regulator-compatible = "ldo_vgp5";
481				regulator-name = "vgp5";
482				regulator-min-microvolt = <1200000>;
483				regulator-max-microvolt = <3000000>;
484				regulator-enable-ramp-delay = <218>;
485			};
486
487			mt6397_vgp6_reg: ldo_vgp6 {
488				regulator-compatible = "ldo_vgp6";
489				regulator-name = "vgp6";
490				regulator-min-microvolt = <1200000>;
491				regulator-max-microvolt = <3300000>;
492				regulator-enable-ramp-delay = <218>;
493			};
494
495			mt6397_vibr_reg: ldo_vibr {
496				regulator-compatible = "ldo_vibr";
497				regulator-name = "vibr";
498				regulator-min-microvolt = <1300000>;
499				regulator-max-microvolt = <3300000>;
500				regulator-enable-ramp-delay = <218>;
501			};
502		};
503	};
504};
505
506&pio {
507	spi_pins_a: spi0 {
508		pins_spi {
509			pinmux = <MT8173_PIN_69_SPI_CK__FUNC_SPI_CK_0_>,
510				<MT8173_PIN_70_SPI_MI__FUNC_SPI_MI_0_>,
511				<MT8173_PIN_71_SPI_MO__FUNC_SPI_MO_0_>,
512				<MT8173_PIN_72_SPI_CS__FUNC_SPI_CS_0_>;
513		};
514	};
515};
516
517&spi {
518	pinctrl-names = "default";
519	pinctrl-0 = <&spi_pins_a>;
520	mediatek,pad-select = <0>;
521	status = "okay";
522};
523
524&ssusb {
525	vusb33-supply = <&mt6397_vusb_reg>;
526	vbus-supply = <&usb_p0_vbus>;
527	extcon = <&extcon_usb>;
528	dr_mode = "otg";
529	wakeup-source;
530	pinctrl-names = "default";
531	pinctrl-0 = <&usb_id_pins_float>;
532	status = "okay";
533};
534
535&uart0 {
536	status = "okay";
537};
538
539&usb_host {
540	vusb33-supply = <&mt6397_vusb_reg>;
541	vbus-supply = <&usb_p1_vbus>;
542	status = "okay";
543};
544