1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2019-2020 Realtek Corporation
3 */
4
5 #include "coex.h"
6 #include "core.h"
7 #include "efuse.h"
8 #include "fw.h"
9 #include "mac.h"
10 #include "phy.h"
11 #include "ps.h"
12 #include "reg.h"
13 #include "sar.h"
14 #include "ser.h"
15 #include "txrx.h"
16 #include "util.h"
17
18 static bool rtw89_disable_ps_mode;
19 module_param_named(disable_ps_mode, rtw89_disable_ps_mode, bool, 0644);
20 MODULE_PARM_DESC(disable_ps_mode, "Set Y to disable low power mode");
21
22 static struct ieee80211_channel rtw89_channels_2ghz[] = {
23 { .center_freq = 2412, .hw_value = 1, },
24 { .center_freq = 2417, .hw_value = 2, },
25 { .center_freq = 2422, .hw_value = 3, },
26 { .center_freq = 2427, .hw_value = 4, },
27 { .center_freq = 2432, .hw_value = 5, },
28 { .center_freq = 2437, .hw_value = 6, },
29 { .center_freq = 2442, .hw_value = 7, },
30 { .center_freq = 2447, .hw_value = 8, },
31 { .center_freq = 2452, .hw_value = 9, },
32 { .center_freq = 2457, .hw_value = 10, },
33 { .center_freq = 2462, .hw_value = 11, },
34 { .center_freq = 2467, .hw_value = 12, },
35 { .center_freq = 2472, .hw_value = 13, },
36 { .center_freq = 2484, .hw_value = 14, },
37 };
38
39 static struct ieee80211_channel rtw89_channels_5ghz[] = {
40 {.center_freq = 5180, .hw_value = 36,},
41 {.center_freq = 5200, .hw_value = 40,},
42 {.center_freq = 5220, .hw_value = 44,},
43 {.center_freq = 5240, .hw_value = 48,},
44 {.center_freq = 5260, .hw_value = 52,},
45 {.center_freq = 5280, .hw_value = 56,},
46 {.center_freq = 5300, .hw_value = 60,},
47 {.center_freq = 5320, .hw_value = 64,},
48 {.center_freq = 5500, .hw_value = 100,},
49 {.center_freq = 5520, .hw_value = 104,},
50 {.center_freq = 5540, .hw_value = 108,},
51 {.center_freq = 5560, .hw_value = 112,},
52 {.center_freq = 5580, .hw_value = 116,},
53 {.center_freq = 5600, .hw_value = 120,},
54 {.center_freq = 5620, .hw_value = 124,},
55 {.center_freq = 5640, .hw_value = 128,},
56 {.center_freq = 5660, .hw_value = 132,},
57 {.center_freq = 5680, .hw_value = 136,},
58 {.center_freq = 5700, .hw_value = 140,},
59 {.center_freq = 5720, .hw_value = 144,},
60 {.center_freq = 5745, .hw_value = 149,},
61 {.center_freq = 5765, .hw_value = 153,},
62 {.center_freq = 5785, .hw_value = 157,},
63 {.center_freq = 5805, .hw_value = 161,},
64 {.center_freq = 5825, .hw_value = 165,
65 .flags = IEEE80211_CHAN_NO_HT40MINUS},
66 };
67
68 static struct ieee80211_rate rtw89_bitrates[] = {
69 { .bitrate = 10, .hw_value = 0x00, },
70 { .bitrate = 20, .hw_value = 0x01, },
71 { .bitrate = 55, .hw_value = 0x02, },
72 { .bitrate = 110, .hw_value = 0x03, },
73 { .bitrate = 60, .hw_value = 0x04, },
74 { .bitrate = 90, .hw_value = 0x05, },
75 { .bitrate = 120, .hw_value = 0x06, },
76 { .bitrate = 180, .hw_value = 0x07, },
77 { .bitrate = 240, .hw_value = 0x08, },
78 { .bitrate = 360, .hw_value = 0x09, },
79 { .bitrate = 480, .hw_value = 0x0a, },
80 { .bitrate = 540, .hw_value = 0x0b, },
81 };
82
rtw89_ra_report_to_bitrate(struct rtw89_dev * rtwdev,u8 rpt_rate)83 u16 rtw89_ra_report_to_bitrate(struct rtw89_dev *rtwdev, u8 rpt_rate)
84 {
85 struct ieee80211_rate rate;
86
87 if (unlikely(rpt_rate >= ARRAY_SIZE(rtw89_bitrates))) {
88 rtw89_info(rtwdev, "invalid rpt rate %d\n", rpt_rate);
89 return 0;
90 }
91
92 rate = rtw89_bitrates[rpt_rate];
93
94 return rate.bitrate;
95 }
96
97 static struct ieee80211_supported_band rtw89_sband_2ghz = {
98 .band = NL80211_BAND_2GHZ,
99 .channels = rtw89_channels_2ghz,
100 .n_channels = ARRAY_SIZE(rtw89_channels_2ghz),
101 .bitrates = rtw89_bitrates,
102 .n_bitrates = ARRAY_SIZE(rtw89_bitrates),
103 .ht_cap = {0},
104 .vht_cap = {0},
105 };
106
107 static struct ieee80211_supported_band rtw89_sband_5ghz = {
108 .band = NL80211_BAND_5GHZ,
109 .channels = rtw89_channels_5ghz,
110 .n_channels = ARRAY_SIZE(rtw89_channels_5ghz),
111
112 /* 5G has no CCK rates, 1M/2M/5.5M/11M */
113 .bitrates = rtw89_bitrates + 4,
114 .n_bitrates = ARRAY_SIZE(rtw89_bitrates) - 4,
115 .ht_cap = {0},
116 .vht_cap = {0},
117 };
118
rtw89_traffic_stats_accu(struct rtw89_dev * rtwdev,struct rtw89_traffic_stats * stats,struct sk_buff * skb,bool tx)119 static void rtw89_traffic_stats_accu(struct rtw89_dev *rtwdev,
120 struct rtw89_traffic_stats *stats,
121 struct sk_buff *skb, bool tx)
122 {
123 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
124
125 if (!ieee80211_is_data(hdr->frame_control))
126 return;
127
128 if (is_broadcast_ether_addr(hdr->addr1) ||
129 is_multicast_ether_addr(hdr->addr1))
130 return;
131
132 if (tx) {
133 stats->tx_cnt++;
134 stats->tx_unicast += skb->len;
135 } else {
136 stats->rx_cnt++;
137 stats->rx_unicast += skb->len;
138 }
139 }
140
rtw89_get_channel_params(struct cfg80211_chan_def * chandef,struct rtw89_channel_params * chan_param)141 static void rtw89_get_channel_params(struct cfg80211_chan_def *chandef,
142 struct rtw89_channel_params *chan_param)
143 {
144 struct ieee80211_channel *channel = chandef->chan;
145 enum nl80211_chan_width width = chandef->width;
146 u8 *cch_by_bw = chan_param->cch_by_bw;
147 u32 primary_freq, center_freq;
148 u8 center_chan;
149 u8 bandwidth = RTW89_CHANNEL_WIDTH_20;
150 u8 primary_chan_idx = 0;
151 u8 i;
152
153 center_chan = channel->hw_value;
154 primary_freq = channel->center_freq;
155 center_freq = chandef->center_freq1;
156
157 /* assign the center channel used while 20M bw is selected */
158 cch_by_bw[RTW89_CHANNEL_WIDTH_20] = channel->hw_value;
159
160 switch (width) {
161 case NL80211_CHAN_WIDTH_20_NOHT:
162 case NL80211_CHAN_WIDTH_20:
163 bandwidth = RTW89_CHANNEL_WIDTH_20;
164 primary_chan_idx = RTW89_SC_DONT_CARE;
165 break;
166 case NL80211_CHAN_WIDTH_40:
167 bandwidth = RTW89_CHANNEL_WIDTH_40;
168 if (primary_freq > center_freq) {
169 primary_chan_idx = RTW89_SC_20_UPPER;
170 center_chan -= 2;
171 } else {
172 primary_chan_idx = RTW89_SC_20_LOWER;
173 center_chan += 2;
174 }
175 break;
176 case NL80211_CHAN_WIDTH_80:
177 bandwidth = RTW89_CHANNEL_WIDTH_80;
178 if (primary_freq > center_freq) {
179 if (primary_freq - center_freq == 10) {
180 primary_chan_idx = RTW89_SC_20_UPPER;
181 center_chan -= 2;
182 } else {
183 primary_chan_idx = RTW89_SC_20_UPMOST;
184 center_chan -= 6;
185 }
186 /* assign the center channel used
187 * while 40M bw is selected
188 */
189 cch_by_bw[RTW89_CHANNEL_WIDTH_40] = center_chan + 4;
190 } else {
191 if (center_freq - primary_freq == 10) {
192 primary_chan_idx = RTW89_SC_20_LOWER;
193 center_chan += 2;
194 } else {
195 primary_chan_idx = RTW89_SC_20_LOWEST;
196 center_chan += 6;
197 }
198 /* assign the center channel used
199 * while 40M bw is selected
200 */
201 cch_by_bw[RTW89_CHANNEL_WIDTH_40] = center_chan - 4;
202 }
203 break;
204 default:
205 center_chan = 0;
206 break;
207 }
208
209 chan_param->center_chan = center_chan;
210 chan_param->primary_chan = channel->hw_value;
211 chan_param->bandwidth = bandwidth;
212 chan_param->pri_ch_idx = primary_chan_idx;
213
214 /* assign the center channel used while current bw is selected */
215 cch_by_bw[bandwidth] = center_chan;
216
217 for (i = bandwidth + 1; i <= RTW89_MAX_CHANNEL_WIDTH; i++)
218 cch_by_bw[i] = 0;
219 }
220
rtw89_set_channel(struct rtw89_dev * rtwdev)221 void rtw89_set_channel(struct rtw89_dev *rtwdev)
222 {
223 struct ieee80211_hw *hw = rtwdev->hw;
224 const struct rtw89_chip_info *chip = rtwdev->chip;
225 struct rtw89_hal *hal = &rtwdev->hal;
226 struct rtw89_channel_params ch_param;
227 struct rtw89_channel_help_params bak;
228 u8 center_chan, bandwidth;
229 u8 band_type;
230 bool band_changed;
231 u8 i;
232
233 rtw89_get_channel_params(&hw->conf.chandef, &ch_param);
234 if (WARN(ch_param.center_chan == 0, "Invalid channel\n"))
235 return;
236
237 center_chan = ch_param.center_chan;
238 bandwidth = ch_param.bandwidth;
239 band_type = center_chan > 14 ? RTW89_BAND_5G : RTW89_BAND_2G;
240 band_changed = hal->current_band_type != band_type ||
241 hal->current_channel == 0;
242
243 hal->current_band_width = bandwidth;
244 hal->current_channel = center_chan;
245 hal->current_primary_channel = ch_param.primary_chan;
246 hal->current_band_type = band_type;
247
248 switch (center_chan) {
249 case 1 ... 14:
250 hal->current_subband = RTW89_CH_2G;
251 break;
252 case 36 ... 64:
253 hal->current_subband = RTW89_CH_5G_BAND_1;
254 break;
255 case 100 ... 144:
256 hal->current_subband = RTW89_CH_5G_BAND_3;
257 break;
258 case 149 ... 177:
259 hal->current_subband = RTW89_CH_5G_BAND_4;
260 break;
261 }
262
263 for (i = RTW89_CHANNEL_WIDTH_20; i <= RTW89_MAX_CHANNEL_WIDTH; i++)
264 hal->cch_by_bw[i] = ch_param.cch_by_bw[i];
265
266 rtw89_chip_set_channel_prepare(rtwdev, &bak);
267
268 chip->ops->set_channel(rtwdev, &ch_param);
269
270 rtw89_chip_set_txpwr(rtwdev);
271
272 rtw89_chip_set_channel_done(rtwdev, &bak);
273
274 if (band_changed) {
275 rtw89_btc_ntfy_switch_band(rtwdev, RTW89_PHY_0, hal->current_band_type);
276 rtw89_chip_rfk_band_changed(rtwdev);
277 }
278 }
279
280 static enum rtw89_core_tx_type
rtw89_core_get_tx_type(struct rtw89_dev * rtwdev,struct sk_buff * skb)281 rtw89_core_get_tx_type(struct rtw89_dev *rtwdev,
282 struct sk_buff *skb)
283 {
284 struct ieee80211_hdr *hdr = (void *)skb->data;
285 __le16 fc = hdr->frame_control;
286
287 if (ieee80211_is_mgmt(fc) || ieee80211_is_nullfunc(fc))
288 return RTW89_CORE_TX_TYPE_MGMT;
289
290 return RTW89_CORE_TX_TYPE_DATA;
291 }
292
293 static void
rtw89_core_tx_update_ampdu_info(struct rtw89_dev * rtwdev,struct rtw89_core_tx_request * tx_req,u8 tid)294 rtw89_core_tx_update_ampdu_info(struct rtw89_dev *rtwdev,
295 struct rtw89_core_tx_request *tx_req, u8 tid)
296 {
297 struct ieee80211_sta *sta = tx_req->sta;
298 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
299 struct rtw89_sta *rtwsta;
300 u8 ampdu_num;
301
302 if (!sta) {
303 rtw89_warn(rtwdev, "cannot set ampdu info without sta\n");
304 return;
305 }
306
307 rtwsta = (struct rtw89_sta *)sta->drv_priv;
308
309 ampdu_num = (u8)((rtwsta->ampdu_params[tid].agg_num ?
310 rtwsta->ampdu_params[tid].agg_num :
311 4 << sta->ht_cap.ampdu_factor) - 1);
312
313 desc_info->agg_en = true;
314 desc_info->ampdu_density = sta->ht_cap.ampdu_density;
315 desc_info->ampdu_num = ampdu_num;
316 }
317
318 static void
rtw89_core_tx_update_sec_key(struct rtw89_dev * rtwdev,struct rtw89_core_tx_request * tx_req)319 rtw89_core_tx_update_sec_key(struct rtw89_dev *rtwdev,
320 struct rtw89_core_tx_request *tx_req)
321 {
322 struct ieee80211_vif *vif = tx_req->vif;
323 struct ieee80211_tx_info *info;
324 struct ieee80211_key_conf *key;
325 struct rtw89_vif *rtwvif;
326 struct rtw89_addr_cam_entry *addr_cam;
327 struct rtw89_sec_cam_entry *sec_cam;
328 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
329 struct sk_buff *skb = tx_req->skb;
330 u8 sec_type = RTW89_SEC_KEY_TYPE_NONE;
331
332 if (!vif) {
333 rtw89_warn(rtwdev, "cannot set sec key without vif\n");
334 return;
335 }
336
337 rtwvif = (struct rtw89_vif *)vif->drv_priv;
338 addr_cam = &rtwvif->addr_cam;
339
340 info = IEEE80211_SKB_CB(skb);
341 key = info->control.hw_key;
342 sec_cam = addr_cam->sec_entries[key->hw_key_idx];
343 if (!sec_cam) {
344 rtw89_warn(rtwdev, "sec cam entry is empty\n");
345 return;
346 }
347
348 switch (key->cipher) {
349 case WLAN_CIPHER_SUITE_WEP40:
350 sec_type = RTW89_SEC_KEY_TYPE_WEP40;
351 break;
352 case WLAN_CIPHER_SUITE_WEP104:
353 sec_type = RTW89_SEC_KEY_TYPE_WEP104;
354 break;
355 case WLAN_CIPHER_SUITE_TKIP:
356 sec_type = RTW89_SEC_KEY_TYPE_TKIP;
357 break;
358 case WLAN_CIPHER_SUITE_CCMP:
359 sec_type = RTW89_SEC_KEY_TYPE_CCMP128;
360 break;
361 case WLAN_CIPHER_SUITE_CCMP_256:
362 sec_type = RTW89_SEC_KEY_TYPE_CCMP256;
363 break;
364 case WLAN_CIPHER_SUITE_GCMP:
365 sec_type = RTW89_SEC_KEY_TYPE_GCMP128;
366 break;
367 case WLAN_CIPHER_SUITE_GCMP_256:
368 sec_type = RTW89_SEC_KEY_TYPE_GCMP256;
369 break;
370 default:
371 rtw89_warn(rtwdev, "key cipher not supported %d\n", key->cipher);
372 return;
373 }
374
375 desc_info->sec_en = true;
376 desc_info->sec_type = sec_type;
377 desc_info->sec_cam_idx = sec_cam->sec_cam_idx;
378 }
379
rtw89_core_get_mgmt_rate(struct rtw89_dev * rtwdev,struct rtw89_core_tx_request * tx_req)380 static u16 rtw89_core_get_mgmt_rate(struct rtw89_dev *rtwdev,
381 struct rtw89_core_tx_request *tx_req)
382 {
383 struct sk_buff *skb = tx_req->skb;
384 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
385 struct ieee80211_vif *vif = tx_info->control.vif;
386 struct rtw89_hal *hal = &rtwdev->hal;
387 u16 lowest_rate = hal->current_band_type == RTW89_BAND_2G ?
388 RTW89_HW_RATE_CCK1 : RTW89_HW_RATE_OFDM6;
389
390 if (!vif || !vif->bss_conf.basic_rates || !tx_req->sta)
391 return lowest_rate;
392
393 return __ffs(vif->bss_conf.basic_rates) + lowest_rate;
394 }
395
396 static void
rtw89_core_tx_update_mgmt_info(struct rtw89_dev * rtwdev,struct rtw89_core_tx_request * tx_req)397 rtw89_core_tx_update_mgmt_info(struct rtw89_dev *rtwdev,
398 struct rtw89_core_tx_request *tx_req)
399 {
400 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
401 u8 qsel, ch_dma;
402
403 qsel = RTW89_TX_QSEL_B0_MGMT;
404 ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel);
405
406 desc_info->qsel = RTW89_TX_QSEL_B0_MGMT;
407 desc_info->ch_dma = ch_dma;
408
409 /* fixed data rate for mgmt frames */
410 desc_info->en_wd_info = true;
411 desc_info->use_rate = true;
412 desc_info->dis_data_fb = true;
413 desc_info->data_rate = rtw89_core_get_mgmt_rate(rtwdev, tx_req);
414
415 rtw89_debug(rtwdev, RTW89_DBG_TXRX,
416 "tx mgmt frame with rate 0x%x on channel %d (bw %d)\n",
417 desc_info->data_rate, rtwdev->hal.current_channel,
418 rtwdev->hal.current_band_width);
419 }
420
421 static void
rtw89_core_tx_update_h2c_info(struct rtw89_dev * rtwdev,struct rtw89_core_tx_request * tx_req)422 rtw89_core_tx_update_h2c_info(struct rtw89_dev *rtwdev,
423 struct rtw89_core_tx_request *tx_req)
424 {
425 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
426
427 desc_info->is_bmc = false;
428 desc_info->wd_page = false;
429 desc_info->ch_dma = RTW89_DMA_H2C;
430 }
431
rtw89_core_get_no_ul_ofdma_htc(struct rtw89_dev * rtwdev,__le32 * htc)432 static void rtw89_core_get_no_ul_ofdma_htc(struct rtw89_dev *rtwdev, __le32 *htc)
433 {
434 static const u8 rtw89_bandwidth_to_om[] = {
435 [RTW89_CHANNEL_WIDTH_20] = HTC_OM_CHANNEL_WIDTH_20,
436 [RTW89_CHANNEL_WIDTH_40] = HTC_OM_CHANNEL_WIDTH_40,
437 [RTW89_CHANNEL_WIDTH_80] = HTC_OM_CHANNEL_WIDTH_80,
438 [RTW89_CHANNEL_WIDTH_160] = HTC_OM_CHANNEL_WIDTH_160_OR_80_80,
439 [RTW89_CHANNEL_WIDTH_80_80] = HTC_OM_CHANNEL_WIDTH_160_OR_80_80,
440 };
441 const struct rtw89_chip_info *chip = rtwdev->chip;
442 struct rtw89_hal *hal = &rtwdev->hal;
443 u8 om_bandwidth;
444
445 if (!chip->dis_2g_40m_ul_ofdma ||
446 hal->current_band_type != RTW89_BAND_2G ||
447 hal->current_band_width != RTW89_CHANNEL_WIDTH_40)
448 return;
449
450 om_bandwidth = hal->current_band_width < ARRAY_SIZE(rtw89_bandwidth_to_om) ?
451 rtw89_bandwidth_to_om[hal->current_band_width] : 0;
452 *htc = le32_encode_bits(RTW89_HTC_VARIANT_HE, RTW89_HTC_MASK_VARIANT) |
453 le32_encode_bits(RTW89_HTC_VARIANT_HE_CID_OM, RTW89_HTC_MASK_CTL_ID) |
454 le32_encode_bits(hal->rx_nss - 1, RTW89_HTC_MASK_HTC_OM_RX_NSS) |
455 le32_encode_bits(om_bandwidth, RTW89_HTC_MASK_HTC_OM_CH_WIDTH) |
456 le32_encode_bits(1, RTW89_HTC_MASK_HTC_OM_UL_MU_DIS) |
457 le32_encode_bits(hal->tx_nss - 1, RTW89_HTC_MASK_HTC_OM_TX_NSTS) |
458 le32_encode_bits(0, RTW89_HTC_MASK_HTC_OM_ER_SU_DIS) |
459 le32_encode_bits(0, RTW89_HTC_MASK_HTC_OM_DL_MU_MIMO_RR) |
460 le32_encode_bits(0, RTW89_HTC_MASK_HTC_OM_UL_MU_DATA_DIS);
461 }
462
463 static bool
__rtw89_core_tx_check_he_qos_htc(struct rtw89_dev * rtwdev,struct rtw89_core_tx_request * tx_req,enum btc_pkt_type pkt_type)464 __rtw89_core_tx_check_he_qos_htc(struct rtw89_dev *rtwdev,
465 struct rtw89_core_tx_request *tx_req,
466 enum btc_pkt_type pkt_type)
467 {
468 struct ieee80211_sta *sta = tx_req->sta;
469 struct sk_buff *skb = tx_req->skb;
470 struct ieee80211_hdr *hdr = (void *)skb->data;
471 __le16 fc = hdr->frame_control;
472
473 /* AP IOT issue with EAPoL, ARP and DHCP */
474 if (pkt_type < PACKET_MAX)
475 return false;
476
477 if (!sta || !sta->he_cap.has_he)
478 return false;
479
480 if (!ieee80211_is_data_qos(fc))
481 return false;
482
483 if (skb_headroom(skb) < IEEE80211_HT_CTL_LEN)
484 return false;
485
486 return true;
487 }
488
489 static void
__rtw89_core_tx_adjust_he_qos_htc(struct rtw89_dev * rtwdev,struct rtw89_core_tx_request * tx_req)490 __rtw89_core_tx_adjust_he_qos_htc(struct rtw89_dev *rtwdev,
491 struct rtw89_core_tx_request *tx_req)
492 {
493 struct ieee80211_sta *sta = tx_req->sta;
494 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
495 struct sk_buff *skb = tx_req->skb;
496 struct ieee80211_hdr *hdr = (void *)skb->data;
497 __le16 fc = hdr->frame_control;
498 void *data;
499 __le32 *htc;
500 u8 *qc;
501 int hdr_len;
502
503 hdr_len = ieee80211_has_a4(fc) ? 32 : 26;
504 data = skb_push(skb, IEEE80211_HT_CTL_LEN);
505 memmove(data, data + IEEE80211_HT_CTL_LEN, hdr_len);
506
507 hdr = data;
508 htc = data + hdr_len;
509 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_ORDER);
510 *htc = rtwsta->htc_template ? rtwsta->htc_template :
511 le32_encode_bits(RTW89_HTC_VARIANT_HE, RTW89_HTC_MASK_VARIANT) |
512 le32_encode_bits(RTW89_HTC_VARIANT_HE_CID_CAS, RTW89_HTC_MASK_CTL_ID);
513
514 qc = data + hdr_len - IEEE80211_QOS_CTL_LEN;
515 qc[0] |= IEEE80211_QOS_CTL_EOSP;
516 }
517
518 static void
rtw89_core_tx_update_he_qos_htc(struct rtw89_dev * rtwdev,struct rtw89_core_tx_request * tx_req,enum btc_pkt_type pkt_type)519 rtw89_core_tx_update_he_qos_htc(struct rtw89_dev *rtwdev,
520 struct rtw89_core_tx_request *tx_req,
521 enum btc_pkt_type pkt_type)
522 {
523 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
524 struct ieee80211_vif *vif = tx_req->vif;
525 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
526
527 if (!__rtw89_core_tx_check_he_qos_htc(rtwdev, tx_req, pkt_type))
528 goto desc_bk;
529
530 __rtw89_core_tx_adjust_he_qos_htc(rtwdev, tx_req);
531
532 desc_info->pkt_size += IEEE80211_HT_CTL_LEN;
533 desc_info->a_ctrl_bsr = true;
534
535 desc_bk:
536 if (!rtwvif || rtwvif->last_a_ctrl == desc_info->a_ctrl_bsr)
537 return;
538
539 rtwvif->last_a_ctrl = desc_info->a_ctrl_bsr;
540 desc_info->bk = true;
541 }
542
543 static void
rtw89_core_tx_update_data_info(struct rtw89_dev * rtwdev,struct rtw89_core_tx_request * tx_req)544 rtw89_core_tx_update_data_info(struct rtw89_dev *rtwdev,
545 struct rtw89_core_tx_request *tx_req)
546 {
547 struct ieee80211_vif *vif = tx_req->vif;
548 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
549 struct rtw89_phy_rate_pattern *rate_pattern = &rtwvif->rate_pattern;
550 struct rtw89_hal *hal = &rtwdev->hal;
551 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
552 struct sk_buff *skb = tx_req->skb;
553 u8 tid, tid_indicate;
554 u8 qsel, ch_dma;
555
556 tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
557 tid_indicate = rtw89_core_get_tid_indicate(rtwdev, tid);
558 qsel = rtw89_core_get_qsel(rtwdev, tid);
559 ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel);
560
561 desc_info->ch_dma = ch_dma;
562 desc_info->tid_indicate = tid_indicate;
563 desc_info->qsel = qsel;
564
565 /* enable wd_info for AMPDU */
566 desc_info->en_wd_info = true;
567
568 if (IEEE80211_SKB_CB(skb)->flags & IEEE80211_TX_CTL_AMPDU)
569 rtw89_core_tx_update_ampdu_info(rtwdev, tx_req, tid);
570 if (IEEE80211_SKB_CB(skb)->control.hw_key)
571 rtw89_core_tx_update_sec_key(rtwdev, tx_req);
572
573 if (rate_pattern->enable)
574 desc_info->data_retry_lowest_rate = rate_pattern->rate;
575 else if (hal->current_band_type == RTW89_BAND_2G)
576 desc_info->data_retry_lowest_rate = RTW89_HW_RATE_CCK1;
577 else
578 desc_info->data_retry_lowest_rate = RTW89_HW_RATE_OFDM6;
579 }
580
581 static enum btc_pkt_type
rtw89_core_tx_btc_spec_pkt_notify(struct rtw89_dev * rtwdev,struct rtw89_core_tx_request * tx_req)582 rtw89_core_tx_btc_spec_pkt_notify(struct rtw89_dev *rtwdev,
583 struct rtw89_core_tx_request *tx_req)
584 {
585 struct sk_buff *skb = tx_req->skb;
586 struct udphdr *udphdr;
587
588 if (IEEE80211_SKB_CB(skb)->control.flags & IEEE80211_TX_CTRL_PORT_CTRL_PROTO) {
589 ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.eapol_notify_work);
590 return PACKET_EAPOL;
591 }
592
593 if (skb->protocol == htons(ETH_P_ARP)) {
594 ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.arp_notify_work);
595 return PACKET_ARP;
596 }
597
598 if (skb->protocol == htons(ETH_P_IP) &&
599 ip_hdr(skb)->protocol == IPPROTO_UDP) {
600 udphdr = udp_hdr(skb);
601 if (((udphdr->source == htons(67) && udphdr->dest == htons(68)) ||
602 (udphdr->source == htons(68) && udphdr->dest == htons(67))) &&
603 skb->len > 282) {
604 ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.dhcp_notify_work);
605 return PACKET_DHCP;
606 }
607 }
608
609 if (skb->protocol == htons(ETH_P_IP) &&
610 ip_hdr(skb)->protocol == IPPROTO_ICMP) {
611 ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.icmp_notify_work);
612 return PACKET_ICMP;
613 }
614
615 return PACKET_MAX;
616 }
617
618 static void
rtw89_core_tx_update_desc_info(struct rtw89_dev * rtwdev,struct rtw89_core_tx_request * tx_req)619 rtw89_core_tx_update_desc_info(struct rtw89_dev *rtwdev,
620 struct rtw89_core_tx_request *tx_req)
621 {
622 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
623 struct sk_buff *skb = tx_req->skb;
624 struct ieee80211_hdr *hdr = (void *)skb->data;
625 enum rtw89_core_tx_type tx_type;
626 enum btc_pkt_type pkt_type;
627 bool is_bmc;
628 u16 seq;
629
630 seq = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
631 if (tx_req->tx_type != RTW89_CORE_TX_TYPE_FWCMD) {
632 tx_type = rtw89_core_get_tx_type(rtwdev, skb);
633 tx_req->tx_type = tx_type;
634 }
635 is_bmc = (is_broadcast_ether_addr(hdr->addr1) ||
636 is_multicast_ether_addr(hdr->addr1));
637
638 desc_info->seq = seq;
639 desc_info->pkt_size = skb->len;
640 desc_info->is_bmc = is_bmc;
641 desc_info->wd_page = true;
642
643 switch (tx_req->tx_type) {
644 case RTW89_CORE_TX_TYPE_MGMT:
645 rtw89_core_tx_update_mgmt_info(rtwdev, tx_req);
646 break;
647 case RTW89_CORE_TX_TYPE_DATA:
648 rtw89_core_tx_update_data_info(rtwdev, tx_req);
649 pkt_type = rtw89_core_tx_btc_spec_pkt_notify(rtwdev, tx_req);
650 rtw89_core_tx_update_he_qos_htc(rtwdev, tx_req, pkt_type);
651 break;
652 case RTW89_CORE_TX_TYPE_FWCMD:
653 rtw89_core_tx_update_h2c_info(rtwdev, tx_req);
654 break;
655 }
656 }
657
rtw89_core_tx_kick_off(struct rtw89_dev * rtwdev,u8 qsel)658 void rtw89_core_tx_kick_off(struct rtw89_dev *rtwdev, u8 qsel)
659 {
660 u8 ch_dma;
661
662 ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel);
663
664 rtw89_hci_tx_kick_off(rtwdev, ch_dma);
665 }
666
rtw89_h2c_tx(struct rtw89_dev * rtwdev,struct sk_buff * skb,bool fwdl)667 int rtw89_h2c_tx(struct rtw89_dev *rtwdev,
668 struct sk_buff *skb, bool fwdl)
669 {
670 struct rtw89_core_tx_request tx_req = {0};
671 u32 cnt;
672 int ret;
673
674 tx_req.skb = skb;
675 tx_req.tx_type = RTW89_CORE_TX_TYPE_FWCMD;
676 if (fwdl)
677 tx_req.desc_info.fw_dl = true;
678
679 rtw89_core_tx_update_desc_info(rtwdev, &tx_req);
680
681 if (!fwdl)
682 rtw89_hex_dump(rtwdev, RTW89_DBG_FW, "H2C: ", skb->data, skb->len);
683
684 cnt = rtw89_hci_check_and_reclaim_tx_resource(rtwdev, RTW89_TXCH_CH12);
685 if (cnt == 0) {
686 rtw89_err(rtwdev, "no tx fwcmd resource\n");
687 return -ENOSPC;
688 }
689
690 ret = rtw89_hci_tx_write(rtwdev, &tx_req);
691 if (ret) {
692 rtw89_err(rtwdev, "failed to transmit skb to HCI\n");
693 return ret;
694 }
695 rtw89_hci_tx_kick_off(rtwdev, RTW89_TXCH_CH12);
696
697 return 0;
698 }
699
rtw89_core_tx_write(struct rtw89_dev * rtwdev,struct ieee80211_vif * vif,struct ieee80211_sta * sta,struct sk_buff * skb,int * qsel)700 int rtw89_core_tx_write(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif,
701 struct ieee80211_sta *sta, struct sk_buff *skb, int *qsel)
702 {
703 struct rtw89_core_tx_request tx_req = {0};
704 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
705 int ret;
706
707 tx_req.skb = skb;
708 tx_req.sta = sta;
709 tx_req.vif = vif;
710
711 rtw89_traffic_stats_accu(rtwdev, &rtwdev->stats, skb, true);
712 rtw89_traffic_stats_accu(rtwdev, &rtwvif->stats, skb, true);
713 rtw89_core_tx_update_desc_info(rtwdev, &tx_req);
714 ret = rtw89_hci_tx_write(rtwdev, &tx_req);
715 if (ret) {
716 rtw89_err(rtwdev, "failed to transmit skb to HCI\n");
717 return ret;
718 }
719
720 if (qsel)
721 *qsel = tx_req.desc_info.qsel;
722
723 return 0;
724 }
725
rtw89_build_txwd_body0(struct rtw89_tx_desc_info * desc_info)726 static __le32 rtw89_build_txwd_body0(struct rtw89_tx_desc_info *desc_info)
727 {
728 u32 dword = FIELD_PREP(RTW89_TXWD_BODY0_WP_OFFSET, desc_info->wp_offset) |
729 FIELD_PREP(RTW89_TXWD_BODY0_WD_INFO_EN, desc_info->en_wd_info) |
730 FIELD_PREP(RTW89_TXWD_BODY0_CHANNEL_DMA, desc_info->ch_dma) |
731 FIELD_PREP(RTW89_TXWD_BODY0_HDR_LLC_LEN, desc_info->hdr_llc_len) |
732 FIELD_PREP(RTW89_TXWD_BODY0_WD_PAGE, desc_info->wd_page) |
733 FIELD_PREP(RTW89_TXWD_BODY0_FW_DL, desc_info->fw_dl);
734
735 return cpu_to_le32(dword);
736 }
737
rtw89_build_txwd_body2(struct rtw89_tx_desc_info * desc_info)738 static __le32 rtw89_build_txwd_body2(struct rtw89_tx_desc_info *desc_info)
739 {
740 u32 dword = FIELD_PREP(RTW89_TXWD_BODY2_TID_INDICATE, desc_info->tid_indicate) |
741 FIELD_PREP(RTW89_TXWD_BODY2_QSEL, desc_info->qsel) |
742 FIELD_PREP(RTW89_TXWD_BODY2_TXPKT_SIZE, desc_info->pkt_size);
743
744 return cpu_to_le32(dword);
745 }
746
rtw89_build_txwd_body3(struct rtw89_tx_desc_info * desc_info)747 static __le32 rtw89_build_txwd_body3(struct rtw89_tx_desc_info *desc_info)
748 {
749 u32 dword = FIELD_PREP(RTW89_TXWD_BODY3_SW_SEQ, desc_info->seq) |
750 FIELD_PREP(RTW89_TXWD_BODY3_AGG_EN, desc_info->agg_en) |
751 FIELD_PREP(RTW89_TXWD_BODY3_BK, desc_info->bk);
752
753 return cpu_to_le32(dword);
754 }
755
rtw89_build_txwd_info0(struct rtw89_tx_desc_info * desc_info)756 static __le32 rtw89_build_txwd_info0(struct rtw89_tx_desc_info *desc_info)
757 {
758 u32 dword = FIELD_PREP(RTW89_TXWD_INFO0_USE_RATE, desc_info->use_rate) |
759 FIELD_PREP(RTW89_TXWD_INFO0_DATA_RATE, desc_info->data_rate) |
760 FIELD_PREP(RTW89_TXWD_INFO0_DISDATAFB, desc_info->dis_data_fb);
761
762 return cpu_to_le32(dword);
763 }
764
rtw89_build_txwd_info1(struct rtw89_tx_desc_info * desc_info)765 static __le32 rtw89_build_txwd_info1(struct rtw89_tx_desc_info *desc_info)
766 {
767 u32 dword = FIELD_PREP(RTW89_TXWD_INFO1_MAX_AGGNUM, desc_info->ampdu_num) |
768 FIELD_PREP(RTW89_TXWD_INFO1_A_CTRL_BSR, desc_info->a_ctrl_bsr) |
769 FIELD_PREP(RTW89_TXWD_INFO1_DATA_RTY_LOWEST_RATE,
770 desc_info->data_retry_lowest_rate);
771
772 return cpu_to_le32(dword);
773 }
774
rtw89_build_txwd_info2(struct rtw89_tx_desc_info * desc_info)775 static __le32 rtw89_build_txwd_info2(struct rtw89_tx_desc_info *desc_info)
776 {
777 u32 dword = FIELD_PREP(RTW89_TXWD_INFO2_AMPDU_DENSITY, desc_info->ampdu_density) |
778 FIELD_PREP(RTW89_TXWD_INFO2_SEC_TYPE, desc_info->sec_type) |
779 FIELD_PREP(RTW89_TXWD_INFO2_SEC_HW_ENC, desc_info->sec_en) |
780 FIELD_PREP(RTW89_TXWD_INFO2_SEC_CAM_IDX, desc_info->sec_cam_idx);
781
782 return cpu_to_le32(dword);
783 }
784
rtw89_build_txwd_info4(struct rtw89_tx_desc_info * desc_info)785 static __le32 rtw89_build_txwd_info4(struct rtw89_tx_desc_info *desc_info)
786 {
787 u32 dword = FIELD_PREP(RTW89_TXWD_INFO4_RTS_EN, 1) |
788 FIELD_PREP(RTW89_TXWD_INFO4_HW_RTS_EN, 1);
789
790 return cpu_to_le32(dword);
791 }
792
rtw89_core_fill_txdesc(struct rtw89_dev * rtwdev,struct rtw89_tx_desc_info * desc_info,void * txdesc)793 void rtw89_core_fill_txdesc(struct rtw89_dev *rtwdev,
794 struct rtw89_tx_desc_info *desc_info,
795 void *txdesc)
796 {
797 struct rtw89_txwd_body *txwd_body = (struct rtw89_txwd_body *)txdesc;
798 struct rtw89_txwd_info *txwd_info;
799
800 txwd_body->dword0 = rtw89_build_txwd_body0(desc_info);
801 txwd_body->dword2 = rtw89_build_txwd_body2(desc_info);
802 txwd_body->dword3 = rtw89_build_txwd_body3(desc_info);
803
804 if (!desc_info->en_wd_info)
805 return;
806
807 txwd_info = (struct rtw89_txwd_info *)(txwd_body + 1);
808 txwd_info->dword0 = rtw89_build_txwd_info0(desc_info);
809 txwd_info->dword1 = rtw89_build_txwd_info1(desc_info);
810 txwd_info->dword2 = rtw89_build_txwd_info2(desc_info);
811 txwd_info->dword4 = rtw89_build_txwd_info4(desc_info);
812
813 }
814 EXPORT_SYMBOL(rtw89_core_fill_txdesc);
815
rtw89_core_rx_process_mac_ppdu(struct rtw89_dev * rtwdev,struct sk_buff * skb,struct rtw89_rx_phy_ppdu * phy_ppdu)816 static int rtw89_core_rx_process_mac_ppdu(struct rtw89_dev *rtwdev,
817 struct sk_buff *skb,
818 struct rtw89_rx_phy_ppdu *phy_ppdu)
819 {
820 bool rx_cnt_valid = false;
821 u8 plcp_size = 0;
822 u8 usr_num = 0;
823 u8 *phy_sts;
824
825 rx_cnt_valid = RTW89_GET_RXINFO_RX_CNT_VLD(skb->data);
826 plcp_size = RTW89_GET_RXINFO_PLCP_LEN(skb->data) << 3;
827 usr_num = RTW89_GET_RXINFO_USR_NUM(skb->data);
828 if (usr_num > RTW89_PPDU_MAX_USR) {
829 rtw89_warn(rtwdev, "Invalid user number in mac info\n");
830 return -EINVAL;
831 }
832
833 phy_sts = skb->data + RTW89_PPDU_MAC_INFO_SIZE;
834 phy_sts += usr_num * RTW89_PPDU_MAC_INFO_USR_SIZE;
835 /* 8-byte alignment */
836 if (usr_num & BIT(0))
837 phy_sts += RTW89_PPDU_MAC_INFO_USR_SIZE;
838 if (rx_cnt_valid)
839 phy_sts += RTW89_PPDU_MAC_RX_CNT_SIZE;
840 phy_sts += plcp_size;
841
842 phy_ppdu->buf = phy_sts;
843 phy_ppdu->len = skb->data + skb->len - phy_sts;
844
845 return 0;
846 }
847
rtw89_core_rx_process_phy_ppdu_iter(void * data,struct ieee80211_sta * sta)848 static void rtw89_core_rx_process_phy_ppdu_iter(void *data,
849 struct ieee80211_sta *sta)
850 {
851 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
852 struct rtw89_rx_phy_ppdu *phy_ppdu = (struct rtw89_rx_phy_ppdu *)data;
853
854 if (rtwsta->mac_id == phy_ppdu->mac_id && phy_ppdu->to_self)
855 ewma_rssi_add(&rtwsta->avg_rssi, phy_ppdu->rssi_avg);
856 }
857
858 #define VAR_LEN 0xff
859 #define VAR_LEN_UNIT 8
rtw89_core_get_phy_status_ie_len(struct rtw89_dev * rtwdev,u8 * addr)860 static u16 rtw89_core_get_phy_status_ie_len(struct rtw89_dev *rtwdev, u8 *addr)
861 {
862 static const u8 physts_ie_len_tab[32] = {
863 16, 32, 24, 24, 8, 8, 8, 8, VAR_LEN, 8, VAR_LEN, 176, VAR_LEN,
864 VAR_LEN, VAR_LEN, VAR_LEN, VAR_LEN, VAR_LEN, 16, 24, VAR_LEN,
865 VAR_LEN, VAR_LEN, 0, 24, 24, 24, 24, 32, 32, 32, 32
866 };
867 u16 ie_len;
868 u8 ie;
869
870 ie = RTW89_GET_PHY_STS_IE_TYPE(addr);
871 if (physts_ie_len_tab[ie] != VAR_LEN)
872 ie_len = physts_ie_len_tab[ie];
873 else
874 ie_len = RTW89_GET_PHY_STS_IE_LEN(addr) * VAR_LEN_UNIT;
875
876 return ie_len;
877 }
878
rtw89_core_parse_phy_status_ie01(struct rtw89_dev * rtwdev,u8 * addr,struct rtw89_rx_phy_ppdu * phy_ppdu)879 static void rtw89_core_parse_phy_status_ie01(struct rtw89_dev *rtwdev, u8 *addr,
880 struct rtw89_rx_phy_ppdu *phy_ppdu)
881 {
882 s16 cfo;
883
884 /* sign conversion for S(12,2) */
885 cfo = sign_extend32(RTW89_GET_PHY_STS_IE0_CFO(addr), 11);
886 rtw89_phy_cfo_parse(rtwdev, cfo, phy_ppdu);
887 }
888
rtw89_core_process_phy_status_ie(struct rtw89_dev * rtwdev,u8 * addr,struct rtw89_rx_phy_ppdu * phy_ppdu)889 static int rtw89_core_process_phy_status_ie(struct rtw89_dev *rtwdev, u8 *addr,
890 struct rtw89_rx_phy_ppdu *phy_ppdu)
891 {
892 u8 ie;
893
894 ie = RTW89_GET_PHY_STS_IE_TYPE(addr);
895 switch (ie) {
896 case RTW89_PHYSTS_IE01_CMN_OFDM:
897 rtw89_core_parse_phy_status_ie01(rtwdev, addr, phy_ppdu);
898 break;
899 default:
900 break;
901 }
902
903 return 0;
904 }
905
rtw89_core_update_phy_ppdu(struct rtw89_rx_phy_ppdu * phy_ppdu)906 static void rtw89_core_update_phy_ppdu(struct rtw89_rx_phy_ppdu *phy_ppdu)
907 {
908 s8 *rssi = phy_ppdu->rssi;
909 u8 *buf = phy_ppdu->buf;
910
911 phy_ppdu->rssi_avg = RTW89_GET_PHY_STS_RSSI_AVG(buf);
912 rssi[RF_PATH_A] = RTW89_RSSI_RAW_TO_DBM(RTW89_GET_PHY_STS_RSSI_A(buf));
913 rssi[RF_PATH_B] = RTW89_RSSI_RAW_TO_DBM(RTW89_GET_PHY_STS_RSSI_B(buf));
914 rssi[RF_PATH_C] = RTW89_RSSI_RAW_TO_DBM(RTW89_GET_PHY_STS_RSSI_C(buf));
915 rssi[RF_PATH_D] = RTW89_RSSI_RAW_TO_DBM(RTW89_GET_PHY_STS_RSSI_D(buf));
916 }
917
rtw89_core_rx_process_phy_ppdu(struct rtw89_dev * rtwdev,struct rtw89_rx_phy_ppdu * phy_ppdu)918 static int rtw89_core_rx_process_phy_ppdu(struct rtw89_dev *rtwdev,
919 struct rtw89_rx_phy_ppdu *phy_ppdu)
920 {
921 if (RTW89_GET_PHY_STS_LEN(phy_ppdu->buf) << 3 != phy_ppdu->len) {
922 rtw89_warn(rtwdev, "phy ppdu len mismatch\n");
923 return -EINVAL;
924 }
925 rtw89_core_update_phy_ppdu(phy_ppdu);
926 ieee80211_iterate_stations_atomic(rtwdev->hw,
927 rtw89_core_rx_process_phy_ppdu_iter,
928 phy_ppdu);
929
930 return 0;
931 }
932
rtw89_core_rx_parse_phy_sts(struct rtw89_dev * rtwdev,struct rtw89_rx_phy_ppdu * phy_ppdu)933 static int rtw89_core_rx_parse_phy_sts(struct rtw89_dev *rtwdev,
934 struct rtw89_rx_phy_ppdu *phy_ppdu)
935 {
936 u16 ie_len;
937 u8 *pos, *end;
938
939 if (!phy_ppdu->to_self)
940 return 0;
941
942 pos = (u8 *)phy_ppdu->buf + PHY_STS_HDR_LEN;
943 end = (u8 *)phy_ppdu->buf + phy_ppdu->len;
944 while (pos < end) {
945 ie_len = rtw89_core_get_phy_status_ie_len(rtwdev, pos);
946 rtw89_core_process_phy_status_ie(rtwdev, pos, phy_ppdu);
947 pos += ie_len;
948 if (pos > end || ie_len == 0) {
949 rtw89_debug(rtwdev, RTW89_DBG_TXRX,
950 "phy status parse failed\n");
951 return -EINVAL;
952 }
953 }
954
955 return 0;
956 }
957
rtw89_core_rx_process_phy_sts(struct rtw89_dev * rtwdev,struct rtw89_rx_phy_ppdu * phy_ppdu)958 static void rtw89_core_rx_process_phy_sts(struct rtw89_dev *rtwdev,
959 struct rtw89_rx_phy_ppdu *phy_ppdu)
960 {
961 int ret;
962
963 ret = rtw89_core_rx_parse_phy_sts(rtwdev, phy_ppdu);
964 if (ret)
965 rtw89_debug(rtwdev, RTW89_DBG_TXRX, "parse phy sts failed\n");
966 else
967 phy_ppdu->valid = true;
968 }
969
rtw89_rxdesc_to_nl_he_gi(struct rtw89_dev * rtwdev,const struct rtw89_rx_desc_info * desc_info,bool rx_status)970 static u8 rtw89_rxdesc_to_nl_he_gi(struct rtw89_dev *rtwdev,
971 const struct rtw89_rx_desc_info *desc_info,
972 bool rx_status)
973 {
974 switch (desc_info->gi_ltf) {
975 case RTW89_GILTF_SGI_4XHE08:
976 case RTW89_GILTF_2XHE08:
977 case RTW89_GILTF_1XHE08:
978 return NL80211_RATE_INFO_HE_GI_0_8;
979 case RTW89_GILTF_2XHE16:
980 case RTW89_GILTF_1XHE16:
981 return NL80211_RATE_INFO_HE_GI_1_6;
982 case RTW89_GILTF_LGI_4XHE32:
983 return NL80211_RATE_INFO_HE_GI_3_2;
984 default:
985 rtw89_warn(rtwdev, "invalid gi_ltf=%d", desc_info->gi_ltf);
986 return rx_status ? NL80211_RATE_INFO_HE_GI_3_2 : U8_MAX;
987 }
988 }
989
rtw89_core_rx_ppdu_match(struct rtw89_dev * rtwdev,struct rtw89_rx_desc_info * desc_info,struct ieee80211_rx_status * status)990 static bool rtw89_core_rx_ppdu_match(struct rtw89_dev *rtwdev,
991 struct rtw89_rx_desc_info *desc_info,
992 struct ieee80211_rx_status *status)
993 {
994 u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0;
995 u8 data_rate_mode, bw, rate_idx = MASKBYTE0, gi_ltf;
996 u16 data_rate;
997 bool ret;
998
999 data_rate = desc_info->data_rate;
1000 data_rate_mode = GET_DATA_RATE_MODE(data_rate);
1001 if (data_rate_mode == DATA_RATE_MODE_NON_HT) {
1002 rate_idx = GET_DATA_RATE_NOT_HT_IDX(data_rate);
1003 /* No 4 CCK rates for 5G */
1004 if (status->band == NL80211_BAND_5GHZ)
1005 rate_idx -= 4;
1006 } else if (data_rate_mode == DATA_RATE_MODE_HT) {
1007 rate_idx = GET_DATA_RATE_HT_IDX(data_rate);
1008 } else if (data_rate_mode == DATA_RATE_MODE_VHT) {
1009 rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate);
1010 } else if (data_rate_mode == DATA_RATE_MODE_HE) {
1011 rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate);
1012 } else {
1013 rtw89_warn(rtwdev, "invalid RX rate mode %d\n", data_rate_mode);
1014 }
1015
1016 if (desc_info->bw == RTW89_CHANNEL_WIDTH_80)
1017 bw = RATE_INFO_BW_80;
1018 else if (desc_info->bw == RTW89_CHANNEL_WIDTH_40)
1019 bw = RATE_INFO_BW_40;
1020 else
1021 bw = RATE_INFO_BW_20;
1022
1023 gi_ltf = rtw89_rxdesc_to_nl_he_gi(rtwdev, desc_info, false);
1024 ret = rtwdev->ppdu_sts.curr_rx_ppdu_cnt[band] == desc_info->ppdu_cnt &&
1025 status->rate_idx == rate_idx &&
1026 status->he_gi == gi_ltf &&
1027 status->bw == bw;
1028
1029 return ret;
1030 }
1031
1032 struct rtw89_vif_rx_stats_iter_data {
1033 struct rtw89_dev *rtwdev;
1034 struct rtw89_rx_phy_ppdu *phy_ppdu;
1035 struct rtw89_rx_desc_info *desc_info;
1036 struct sk_buff *skb;
1037 const u8 *bssid;
1038 };
1039
rtw89_vif_rx_stats_iter(void * data,u8 * mac,struct ieee80211_vif * vif)1040 static void rtw89_vif_rx_stats_iter(void *data, u8 *mac,
1041 struct ieee80211_vif *vif)
1042 {
1043 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
1044 struct rtw89_vif_rx_stats_iter_data *iter_data = data;
1045 struct rtw89_dev *rtwdev = iter_data->rtwdev;
1046 struct rtw89_pkt_stat *pkt_stat = &rtwdev->phystat.cur_pkt_stat;
1047 struct rtw89_rx_desc_info *desc_info = iter_data->desc_info;
1048 struct sk_buff *skb = iter_data->skb;
1049 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1050 const u8 *bssid = iter_data->bssid;
1051
1052 if (!ether_addr_equal(vif->bss_conf.bssid, bssid))
1053 return;
1054
1055 if (ieee80211_is_beacon(hdr->frame_control))
1056 pkt_stat->beacon_nr++;
1057
1058 if (!ether_addr_equal(vif->addr, hdr->addr1))
1059 return;
1060
1061 if (desc_info->data_rate < RTW89_HW_RATE_NR)
1062 pkt_stat->rx_rate_cnt[desc_info->data_rate]++;
1063
1064 rtw89_traffic_stats_accu(rtwdev, &rtwvif->stats, skb, false);
1065 }
1066
rtw89_core_rx_stats(struct rtw89_dev * rtwdev,struct rtw89_rx_phy_ppdu * phy_ppdu,struct rtw89_rx_desc_info * desc_info,struct sk_buff * skb)1067 static void rtw89_core_rx_stats(struct rtw89_dev *rtwdev,
1068 struct rtw89_rx_phy_ppdu *phy_ppdu,
1069 struct rtw89_rx_desc_info *desc_info,
1070 struct sk_buff *skb)
1071 {
1072 struct rtw89_vif_rx_stats_iter_data iter_data;
1073
1074 rtw89_traffic_stats_accu(rtwdev, &rtwdev->stats, skb, false);
1075
1076 iter_data.rtwdev = rtwdev;
1077 iter_data.phy_ppdu = phy_ppdu;
1078 iter_data.desc_info = desc_info;
1079 iter_data.skb = skb;
1080 iter_data.bssid = get_hdr_bssid((struct ieee80211_hdr *)skb->data);
1081 rtw89_iterate_vifs_bh(rtwdev, rtw89_vif_rx_stats_iter, &iter_data);
1082 }
1083
rtw89_core_rx_pending_skb(struct rtw89_dev * rtwdev,struct rtw89_rx_phy_ppdu * phy_ppdu,struct rtw89_rx_desc_info * desc_info,struct sk_buff * skb)1084 static void rtw89_core_rx_pending_skb(struct rtw89_dev *rtwdev,
1085 struct rtw89_rx_phy_ppdu *phy_ppdu,
1086 struct rtw89_rx_desc_info *desc_info,
1087 struct sk_buff *skb)
1088 {
1089 u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0;
1090 int curr = rtwdev->ppdu_sts.curr_rx_ppdu_cnt[band];
1091 struct sk_buff *skb_ppdu = NULL, *tmp;
1092 struct ieee80211_rx_status *rx_status;
1093
1094 if (curr > RTW89_MAX_PPDU_CNT)
1095 return;
1096
1097 skb_queue_walk_safe(&rtwdev->ppdu_sts.rx_queue[band], skb_ppdu, tmp) {
1098 skb_unlink(skb_ppdu, &rtwdev->ppdu_sts.rx_queue[band]);
1099 rx_status = IEEE80211_SKB_RXCB(skb_ppdu);
1100 if (rtw89_core_rx_ppdu_match(rtwdev, desc_info, rx_status))
1101 rtw89_chip_query_ppdu(rtwdev, phy_ppdu, rx_status);
1102 rtw89_core_rx_stats(rtwdev, phy_ppdu, desc_info, skb_ppdu);
1103 ieee80211_rx_napi(rtwdev->hw, NULL, skb_ppdu, &rtwdev->napi);
1104 rtwdev->napi_budget_countdown--;
1105 }
1106 }
1107
rtw89_core_rx_process_ppdu_sts(struct rtw89_dev * rtwdev,struct rtw89_rx_desc_info * desc_info,struct sk_buff * skb)1108 static void rtw89_core_rx_process_ppdu_sts(struct rtw89_dev *rtwdev,
1109 struct rtw89_rx_desc_info *desc_info,
1110 struct sk_buff *skb)
1111 {
1112 struct rtw89_rx_phy_ppdu phy_ppdu = {.buf = skb->data, .valid = false,
1113 .len = skb->len,
1114 .to_self = desc_info->addr1_match,
1115 .mac_id = desc_info->mac_id};
1116 int ret;
1117
1118 if (desc_info->mac_info_valid)
1119 rtw89_core_rx_process_mac_ppdu(rtwdev, skb, &phy_ppdu);
1120 ret = rtw89_core_rx_process_phy_ppdu(rtwdev, &phy_ppdu);
1121 if (ret)
1122 rtw89_debug(rtwdev, RTW89_DBG_TXRX, "process ppdu failed\n");
1123
1124 rtw89_core_rx_process_phy_sts(rtwdev, &phy_ppdu);
1125 rtw89_core_rx_pending_skb(rtwdev, &phy_ppdu, desc_info, skb);
1126 dev_kfree_skb_any(skb);
1127 }
1128
rtw89_core_rx_process_report(struct rtw89_dev * rtwdev,struct rtw89_rx_desc_info * desc_info,struct sk_buff * skb)1129 static void rtw89_core_rx_process_report(struct rtw89_dev *rtwdev,
1130 struct rtw89_rx_desc_info *desc_info,
1131 struct sk_buff *skb)
1132 {
1133 switch (desc_info->pkt_type) {
1134 case RTW89_CORE_RX_TYPE_C2H:
1135 rtw89_fw_c2h_irqsafe(rtwdev, skb);
1136 break;
1137 case RTW89_CORE_RX_TYPE_PPDU_STAT:
1138 rtw89_core_rx_process_ppdu_sts(rtwdev, desc_info, skb);
1139 break;
1140 default:
1141 rtw89_debug(rtwdev, RTW89_DBG_TXRX, "unhandled pkt_type=%d\n",
1142 desc_info->pkt_type);
1143 dev_kfree_skb_any(skb);
1144 break;
1145 }
1146 }
1147
rtw89_core_query_rxdesc(struct rtw89_dev * rtwdev,struct rtw89_rx_desc_info * desc_info,u8 * data,u32 data_offset)1148 void rtw89_core_query_rxdesc(struct rtw89_dev *rtwdev,
1149 struct rtw89_rx_desc_info *desc_info,
1150 u8 *data, u32 data_offset)
1151 {
1152 struct rtw89_rxdesc_short *rxd_s;
1153 struct rtw89_rxdesc_long *rxd_l;
1154 u8 shift_len, drv_info_len;
1155
1156 rxd_s = (struct rtw89_rxdesc_short *)(data + data_offset);
1157 desc_info->pkt_size = RTW89_GET_RXWD_PKT_SIZE(rxd_s);
1158 desc_info->drv_info_size = RTW89_GET_RXWD_DRV_INFO_SIZE(rxd_s);
1159 desc_info->long_rxdesc = RTW89_GET_RXWD_LONG_RXD(rxd_s);
1160 desc_info->pkt_type = RTW89_GET_RXWD_RPKT_TYPE(rxd_s);
1161 desc_info->mac_info_valid = RTW89_GET_RXWD_MAC_INFO_VALID(rxd_s);
1162 desc_info->bw = RTW89_GET_RXWD_BW(rxd_s);
1163 desc_info->data_rate = RTW89_GET_RXWD_DATA_RATE(rxd_s);
1164 desc_info->gi_ltf = RTW89_GET_RXWD_GI_LTF(rxd_s);
1165 desc_info->user_id = RTW89_GET_RXWD_USER_ID(rxd_s);
1166 desc_info->sr_en = RTW89_GET_RXWD_SR_EN(rxd_s);
1167 desc_info->ppdu_cnt = RTW89_GET_RXWD_PPDU_CNT(rxd_s);
1168 desc_info->ppdu_type = RTW89_GET_RXWD_PPDU_TYPE(rxd_s);
1169 desc_info->free_run_cnt = RTW89_GET_RXWD_FREE_RUN_CNT(rxd_s);
1170 desc_info->icv_err = RTW89_GET_RXWD_ICV_ERR(rxd_s);
1171 desc_info->crc32_err = RTW89_GET_RXWD_CRC32_ERR(rxd_s);
1172 desc_info->hw_dec = RTW89_GET_RXWD_HW_DEC(rxd_s);
1173 desc_info->sw_dec = RTW89_GET_RXWD_SW_DEC(rxd_s);
1174 desc_info->addr1_match = RTW89_GET_RXWD_A1_MATCH(rxd_s);
1175
1176 shift_len = desc_info->shift << 1; /* 2-byte unit */
1177 drv_info_len = desc_info->drv_info_size << 3; /* 8-byte unit */
1178 desc_info->offset = data_offset + shift_len + drv_info_len;
1179 desc_info->ready = true;
1180
1181 if (!desc_info->long_rxdesc)
1182 return;
1183
1184 rxd_l = (struct rtw89_rxdesc_long *)(data + data_offset);
1185 desc_info->frame_type = RTW89_GET_RXWD_TYPE(rxd_l);
1186 desc_info->addr_cam_valid = RTW89_GET_RXWD_ADDR_CAM_VLD(rxd_l);
1187 desc_info->addr_cam_id = RTW89_GET_RXWD_ADDR_CAM_ID(rxd_l);
1188 desc_info->sec_cam_id = RTW89_GET_RXWD_SEC_CAM_ID(rxd_l);
1189 desc_info->mac_id = RTW89_GET_RXWD_MAC_ID(rxd_l);
1190 desc_info->rx_pl_id = RTW89_GET_RXWD_RX_PL_ID(rxd_l);
1191 }
1192 EXPORT_SYMBOL(rtw89_core_query_rxdesc);
1193
1194 struct rtw89_core_iter_rx_status {
1195 struct rtw89_dev *rtwdev;
1196 struct ieee80211_rx_status *rx_status;
1197 struct rtw89_rx_desc_info *desc_info;
1198 u8 mac_id;
1199 };
1200
1201 static
rtw89_core_stats_sta_rx_status_iter(void * data,struct ieee80211_sta * sta)1202 void rtw89_core_stats_sta_rx_status_iter(void *data, struct ieee80211_sta *sta)
1203 {
1204 struct rtw89_core_iter_rx_status *iter_data =
1205 (struct rtw89_core_iter_rx_status *)data;
1206 struct ieee80211_rx_status *rx_status = iter_data->rx_status;
1207 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
1208 struct rtw89_rx_desc_info *desc_info = iter_data->desc_info;
1209 u8 mac_id = iter_data->mac_id;
1210
1211 if (mac_id != rtwsta->mac_id)
1212 return;
1213
1214 rtwsta->rx_status = *rx_status;
1215 rtwsta->rx_hw_rate = desc_info->data_rate;
1216 }
1217
rtw89_core_stats_sta_rx_status(struct rtw89_dev * rtwdev,struct rtw89_rx_desc_info * desc_info,struct ieee80211_rx_status * rx_status)1218 static void rtw89_core_stats_sta_rx_status(struct rtw89_dev *rtwdev,
1219 struct rtw89_rx_desc_info *desc_info,
1220 struct ieee80211_rx_status *rx_status)
1221 {
1222 struct rtw89_core_iter_rx_status iter_data;
1223
1224 if (!desc_info->addr1_match || !desc_info->long_rxdesc)
1225 return;
1226
1227 if (desc_info->frame_type != RTW89_RX_TYPE_DATA)
1228 return;
1229
1230 iter_data.rtwdev = rtwdev;
1231 iter_data.rx_status = rx_status;
1232 iter_data.desc_info = desc_info;
1233 iter_data.mac_id = desc_info->mac_id;
1234 ieee80211_iterate_stations_atomic(rtwdev->hw,
1235 rtw89_core_stats_sta_rx_status_iter,
1236 &iter_data);
1237 }
1238
rtw89_core_update_rx_status(struct rtw89_dev * rtwdev,struct rtw89_rx_desc_info * desc_info,struct ieee80211_rx_status * rx_status)1239 static void rtw89_core_update_rx_status(struct rtw89_dev *rtwdev,
1240 struct rtw89_rx_desc_info *desc_info,
1241 struct ieee80211_rx_status *rx_status)
1242 {
1243 struct ieee80211_hw *hw = rtwdev->hw;
1244 u16 data_rate;
1245 u8 data_rate_mode;
1246
1247 /* currently using single PHY */
1248 rx_status->freq = hw->conf.chandef.chan->center_freq;
1249 rx_status->band = hw->conf.chandef.chan->band;
1250
1251 if (desc_info->icv_err || desc_info->crc32_err)
1252 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
1253
1254 if (desc_info->hw_dec &&
1255 !(desc_info->sw_dec || desc_info->icv_err))
1256 rx_status->flag |= RX_FLAG_DECRYPTED;
1257
1258 if (desc_info->bw == RTW89_CHANNEL_WIDTH_80)
1259 rx_status->bw = RATE_INFO_BW_80;
1260 else if (desc_info->bw == RTW89_CHANNEL_WIDTH_40)
1261 rx_status->bw = RATE_INFO_BW_40;
1262 else
1263 rx_status->bw = RATE_INFO_BW_20;
1264
1265 data_rate = desc_info->data_rate;
1266 data_rate_mode = GET_DATA_RATE_MODE(data_rate);
1267 if (data_rate_mode == DATA_RATE_MODE_NON_HT) {
1268 rx_status->encoding = RX_ENC_LEGACY;
1269 rx_status->rate_idx = GET_DATA_RATE_NOT_HT_IDX(data_rate);
1270 /* No 4 CCK rates for 5G */
1271 if (rx_status->band == NL80211_BAND_5GHZ)
1272 rx_status->rate_idx -= 4;
1273 if (rtwdev->scanning)
1274 rx_status->rate_idx = min_t(u8, rx_status->rate_idx,
1275 ARRAY_SIZE(rtw89_bitrates) - 5);
1276 } else if (data_rate_mode == DATA_RATE_MODE_HT) {
1277 rx_status->encoding = RX_ENC_HT;
1278 rx_status->rate_idx = GET_DATA_RATE_HT_IDX(data_rate);
1279 if (desc_info->gi_ltf)
1280 rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
1281 } else if (data_rate_mode == DATA_RATE_MODE_VHT) {
1282 rx_status->encoding = RX_ENC_VHT;
1283 rx_status->rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate);
1284 rx_status->nss = GET_DATA_RATE_NSS(data_rate) + 1;
1285 if (desc_info->gi_ltf)
1286 rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
1287 } else if (data_rate_mode == DATA_RATE_MODE_HE) {
1288 rx_status->encoding = RX_ENC_HE;
1289 rx_status->rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate);
1290 rx_status->nss = GET_DATA_RATE_NSS(data_rate) + 1;
1291 } else {
1292 rtw89_warn(rtwdev, "invalid RX rate mode %d\n", data_rate_mode);
1293 }
1294
1295 /* he_gi is used to match ppdu, so we always fill it. */
1296 rx_status->he_gi = rtw89_rxdesc_to_nl_he_gi(rtwdev, desc_info, true);
1297 rx_status->flag |= RX_FLAG_MACTIME_START;
1298 rx_status->mactime = desc_info->free_run_cnt;
1299
1300 rtw89_core_stats_sta_rx_status(rtwdev, desc_info, rx_status);
1301 }
1302
rtw89_update_ps_mode(struct rtw89_dev * rtwdev)1303 static enum rtw89_ps_mode rtw89_update_ps_mode(struct rtw89_dev *rtwdev)
1304 {
1305 const struct rtw89_chip_info *chip = rtwdev->chip;
1306
1307 if (rtw89_disable_ps_mode || !chip->ps_mode_supported)
1308 return RTW89_PS_MODE_NONE;
1309
1310 if (chip->ps_mode_supported & BIT(RTW89_PS_MODE_PWR_GATED))
1311 return RTW89_PS_MODE_PWR_GATED;
1312
1313 if (chip->ps_mode_supported & BIT(RTW89_PS_MODE_CLK_GATED))
1314 return RTW89_PS_MODE_CLK_GATED;
1315
1316 if (chip->ps_mode_supported & BIT(RTW89_PS_MODE_RFOFF))
1317 return RTW89_PS_MODE_RFOFF;
1318
1319 return RTW89_PS_MODE_NONE;
1320 }
1321
rtw89_core_flush_ppdu_rx_queue(struct rtw89_dev * rtwdev,struct rtw89_rx_desc_info * desc_info)1322 static void rtw89_core_flush_ppdu_rx_queue(struct rtw89_dev *rtwdev,
1323 struct rtw89_rx_desc_info *desc_info)
1324 {
1325 struct rtw89_ppdu_sts_info *ppdu_sts = &rtwdev->ppdu_sts;
1326 u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0;
1327 struct sk_buff *skb_ppdu, *tmp;
1328
1329 skb_queue_walk_safe(&ppdu_sts->rx_queue[band], skb_ppdu, tmp) {
1330 skb_unlink(skb_ppdu, &ppdu_sts->rx_queue[band]);
1331 rtw89_core_rx_stats(rtwdev, NULL, desc_info, skb_ppdu);
1332 ieee80211_rx_napi(rtwdev->hw, NULL, skb_ppdu, &rtwdev->napi);
1333 rtwdev->napi_budget_countdown--;
1334 }
1335 }
1336
rtw89_core_rx(struct rtw89_dev * rtwdev,struct rtw89_rx_desc_info * desc_info,struct sk_buff * skb)1337 void rtw89_core_rx(struct rtw89_dev *rtwdev,
1338 struct rtw89_rx_desc_info *desc_info,
1339 struct sk_buff *skb)
1340 {
1341 struct ieee80211_rx_status *rx_status;
1342 struct rtw89_ppdu_sts_info *ppdu_sts = &rtwdev->ppdu_sts;
1343 u8 ppdu_cnt = desc_info->ppdu_cnt;
1344 u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0;
1345
1346 if (desc_info->pkt_type != RTW89_CORE_RX_TYPE_WIFI) {
1347 rtw89_core_rx_process_report(rtwdev, desc_info, skb);
1348 return;
1349 }
1350
1351 if (ppdu_sts->curr_rx_ppdu_cnt[band] != ppdu_cnt) {
1352 rtw89_core_flush_ppdu_rx_queue(rtwdev, desc_info);
1353 ppdu_sts->curr_rx_ppdu_cnt[band] = ppdu_cnt;
1354 }
1355
1356 rx_status = IEEE80211_SKB_RXCB(skb);
1357 memset(rx_status, 0, sizeof(*rx_status));
1358 rtw89_core_update_rx_status(rtwdev, desc_info, rx_status);
1359 if (desc_info->long_rxdesc &&
1360 BIT(desc_info->frame_type) & PPDU_FILTER_BITMAP) {
1361 skb_queue_tail(&ppdu_sts->rx_queue[band], skb);
1362 } else {
1363 rtw89_core_rx_stats(rtwdev, NULL, desc_info, skb);
1364 ieee80211_rx_napi(rtwdev->hw, NULL, skb, &rtwdev->napi);
1365 rtwdev->napi_budget_countdown--;
1366 }
1367 }
1368 EXPORT_SYMBOL(rtw89_core_rx);
1369
rtw89_core_napi_start(struct rtw89_dev * rtwdev)1370 void rtw89_core_napi_start(struct rtw89_dev *rtwdev)
1371 {
1372 if (test_and_set_bit(RTW89_FLAG_NAPI_RUNNING, rtwdev->flags))
1373 return;
1374
1375 napi_enable(&rtwdev->napi);
1376 }
1377 EXPORT_SYMBOL(rtw89_core_napi_start);
1378
rtw89_core_napi_stop(struct rtw89_dev * rtwdev)1379 void rtw89_core_napi_stop(struct rtw89_dev *rtwdev)
1380 {
1381 if (!test_and_clear_bit(RTW89_FLAG_NAPI_RUNNING, rtwdev->flags))
1382 return;
1383
1384 napi_synchronize(&rtwdev->napi);
1385 napi_disable(&rtwdev->napi);
1386 }
1387 EXPORT_SYMBOL(rtw89_core_napi_stop);
1388
rtw89_core_napi_init(struct rtw89_dev * rtwdev)1389 void rtw89_core_napi_init(struct rtw89_dev *rtwdev)
1390 {
1391 init_dummy_netdev(&rtwdev->netdev);
1392 netif_napi_add(&rtwdev->netdev, &rtwdev->napi,
1393 rtwdev->hci.ops->napi_poll, NAPI_POLL_WEIGHT);
1394 }
1395 EXPORT_SYMBOL(rtw89_core_napi_init);
1396
rtw89_core_napi_deinit(struct rtw89_dev * rtwdev)1397 void rtw89_core_napi_deinit(struct rtw89_dev *rtwdev)
1398 {
1399 rtw89_core_napi_stop(rtwdev);
1400 netif_napi_del(&rtwdev->napi);
1401 }
1402 EXPORT_SYMBOL(rtw89_core_napi_deinit);
1403
rtw89_core_ba_work(struct work_struct * work)1404 static void rtw89_core_ba_work(struct work_struct *work)
1405 {
1406 struct rtw89_dev *rtwdev =
1407 container_of(work, struct rtw89_dev, ba_work);
1408 struct rtw89_txq *rtwtxq, *tmp;
1409 int ret;
1410
1411 spin_lock_bh(&rtwdev->ba_lock);
1412 list_for_each_entry_safe(rtwtxq, tmp, &rtwdev->ba_list, list) {
1413 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq);
1414 struct ieee80211_sta *sta = txq->sta;
1415 struct rtw89_sta *rtwsta = sta ? (struct rtw89_sta *)sta->drv_priv : NULL;
1416 u8 tid = txq->tid;
1417
1418 if (!sta) {
1419 rtw89_warn(rtwdev, "cannot start BA without sta\n");
1420 goto skip_ba_work;
1421 }
1422
1423 if (rtwsta->disassoc) {
1424 rtw89_debug(rtwdev, RTW89_DBG_TXRX,
1425 "cannot start BA with disassoc sta\n");
1426 goto skip_ba_work;
1427 }
1428
1429 ret = ieee80211_start_tx_ba_session(sta, tid, 0);
1430 if (ret) {
1431 rtw89_debug(rtwdev, RTW89_DBG_TXRX,
1432 "failed to setup BA session for %pM:%2d: %d\n",
1433 sta->addr, tid, ret);
1434 if (ret == -EINVAL)
1435 set_bit(RTW89_TXQ_F_BLOCK_BA, &rtwtxq->flags);
1436 }
1437 skip_ba_work:
1438 list_del_init(&rtwtxq->list);
1439 }
1440 spin_unlock_bh(&rtwdev->ba_lock);
1441 }
1442
rtw89_core_free_sta_pending_ba(struct rtw89_dev * rtwdev,struct ieee80211_sta * sta)1443 static void rtw89_core_free_sta_pending_ba(struct rtw89_dev *rtwdev,
1444 struct ieee80211_sta *sta)
1445 {
1446 struct rtw89_txq *rtwtxq, *tmp;
1447
1448 spin_lock_bh(&rtwdev->ba_lock);
1449 list_for_each_entry_safe(rtwtxq, tmp, &rtwdev->ba_list, list) {
1450 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq);
1451
1452 if (sta == txq->sta)
1453 list_del_init(&rtwtxq->list);
1454 }
1455 spin_unlock_bh(&rtwdev->ba_lock);
1456 }
1457
rtw89_core_txq_check_agg(struct rtw89_dev * rtwdev,struct rtw89_txq * rtwtxq,struct sk_buff * skb)1458 static void rtw89_core_txq_check_agg(struct rtw89_dev *rtwdev,
1459 struct rtw89_txq *rtwtxq,
1460 struct sk_buff *skb)
1461 {
1462 struct ieee80211_hw *hw = rtwdev->hw;
1463 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq);
1464 struct ieee80211_sta *sta = txq->sta;
1465 struct rtw89_sta *rtwsta = sta ? (struct rtw89_sta *)sta->drv_priv : NULL;
1466
1467 if (unlikely(skb_get_queue_mapping(skb) == IEEE80211_AC_VO))
1468 return;
1469
1470 if (unlikely(skb->protocol == cpu_to_be16(ETH_P_PAE)))
1471 return;
1472
1473 if (unlikely(!sta))
1474 return;
1475
1476 if (unlikely(test_bit(RTW89_TXQ_F_BLOCK_BA, &rtwtxq->flags)))
1477 return;
1478
1479 if (test_bit(RTW89_TXQ_F_AMPDU, &rtwtxq->flags)) {
1480 IEEE80211_SKB_CB(skb)->flags |= IEEE80211_TX_CTL_AMPDU;
1481 return;
1482 }
1483
1484 spin_lock_bh(&rtwdev->ba_lock);
1485 if (!rtwsta->disassoc && list_empty(&rtwtxq->list)) {
1486 list_add_tail(&rtwtxq->list, &rtwdev->ba_list);
1487 ieee80211_queue_work(hw, &rtwdev->ba_work);
1488 }
1489 spin_unlock_bh(&rtwdev->ba_lock);
1490 }
1491
rtw89_core_txq_push(struct rtw89_dev * rtwdev,struct rtw89_txq * rtwtxq,unsigned long frame_cnt,unsigned long byte_cnt)1492 static void rtw89_core_txq_push(struct rtw89_dev *rtwdev,
1493 struct rtw89_txq *rtwtxq,
1494 unsigned long frame_cnt,
1495 unsigned long byte_cnt)
1496 {
1497 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq);
1498 struct ieee80211_vif *vif = txq->vif;
1499 struct ieee80211_sta *sta = txq->sta;
1500 struct sk_buff *skb;
1501 unsigned long i;
1502 int ret;
1503
1504 for (i = 0; i < frame_cnt; i++) {
1505 skb = ieee80211_tx_dequeue_ni(rtwdev->hw, txq);
1506 if (!skb) {
1507 rtw89_debug(rtwdev, RTW89_DBG_TXRX, "dequeue a NULL skb\n");
1508 return;
1509 }
1510 rtw89_core_txq_check_agg(rtwdev, rtwtxq, skb);
1511 ret = rtw89_core_tx_write(rtwdev, vif, sta, skb, NULL);
1512 if (ret) {
1513 rtw89_err(rtwdev, "failed to push txq: %d\n", ret);
1514 ieee80211_free_txskb(rtwdev->hw, skb);
1515 break;
1516 }
1517 }
1518 }
1519
rtw89_check_and_reclaim_tx_resource(struct rtw89_dev * rtwdev,u8 tid)1520 static u32 rtw89_check_and_reclaim_tx_resource(struct rtw89_dev *rtwdev, u8 tid)
1521 {
1522 u8 qsel, ch_dma;
1523
1524 qsel = rtw89_core_get_qsel(rtwdev, tid);
1525 ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel);
1526
1527 return rtw89_hci_check_and_reclaim_tx_resource(rtwdev, ch_dma);
1528 }
1529
rtw89_core_txq_agg_wait(struct rtw89_dev * rtwdev,struct ieee80211_txq * txq,unsigned long * frame_cnt,bool * sched_txq,bool * reinvoke)1530 static bool rtw89_core_txq_agg_wait(struct rtw89_dev *rtwdev,
1531 struct ieee80211_txq *txq,
1532 unsigned long *frame_cnt,
1533 bool *sched_txq, bool *reinvoke)
1534 {
1535 struct rtw89_txq *rtwtxq = (struct rtw89_txq *)txq->drv_priv;
1536 struct ieee80211_sta *sta = txq->sta;
1537 struct rtw89_sta *rtwsta = sta ? (struct rtw89_sta *)sta->drv_priv : NULL;
1538
1539 if (!sta || rtwsta->max_agg_wait <= 0)
1540 return false;
1541
1542 if (rtwdev->stats.tx_tfc_lv <= RTW89_TFC_MID)
1543 return false;
1544
1545 if (*frame_cnt > 1) {
1546 *frame_cnt -= 1;
1547 *sched_txq = true;
1548 *reinvoke = true;
1549 rtwtxq->wait_cnt = 1;
1550 return false;
1551 }
1552
1553 if (*frame_cnt == 1 && rtwtxq->wait_cnt < rtwsta->max_agg_wait) {
1554 *reinvoke = true;
1555 rtwtxq->wait_cnt++;
1556 return true;
1557 }
1558
1559 rtwtxq->wait_cnt = 0;
1560 return false;
1561 }
1562
rtw89_core_txq_schedule(struct rtw89_dev * rtwdev,u8 ac,bool * reinvoke)1563 static void rtw89_core_txq_schedule(struct rtw89_dev *rtwdev, u8 ac, bool *reinvoke)
1564 {
1565 struct ieee80211_hw *hw = rtwdev->hw;
1566 struct ieee80211_txq *txq;
1567 struct rtw89_txq *rtwtxq;
1568 unsigned long frame_cnt;
1569 unsigned long byte_cnt;
1570 u32 tx_resource;
1571 bool sched_txq;
1572
1573 ieee80211_txq_schedule_start(hw, ac);
1574 while ((txq = ieee80211_next_txq(hw, ac))) {
1575 rtwtxq = (struct rtw89_txq *)txq->drv_priv;
1576 tx_resource = rtw89_check_and_reclaim_tx_resource(rtwdev, txq->tid);
1577 sched_txq = false;
1578
1579 ieee80211_txq_get_depth(txq, &frame_cnt, &byte_cnt);
1580 if (rtw89_core_txq_agg_wait(rtwdev, txq, &frame_cnt, &sched_txq, reinvoke)) {
1581 ieee80211_return_txq(hw, txq, true);
1582 continue;
1583 }
1584 frame_cnt = min_t(unsigned long, frame_cnt, tx_resource);
1585 rtw89_core_txq_push(rtwdev, rtwtxq, frame_cnt, byte_cnt);
1586 ieee80211_return_txq(hw, txq, sched_txq);
1587 if (frame_cnt != 0)
1588 rtw89_core_tx_kick_off(rtwdev, rtw89_core_get_qsel(rtwdev, txq->tid));
1589 }
1590 ieee80211_txq_schedule_end(hw, ac);
1591 }
1592
rtw89_core_txq_work(struct work_struct * w)1593 static void rtw89_core_txq_work(struct work_struct *w)
1594 {
1595 struct rtw89_dev *rtwdev = container_of(w, struct rtw89_dev, txq_work);
1596 bool reinvoke = false;
1597 u8 ac;
1598
1599 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
1600 rtw89_core_txq_schedule(rtwdev, ac, &reinvoke);
1601
1602 if (reinvoke) {
1603 /* reinvoke to process the last frame */
1604 mod_delayed_work(rtwdev->txq_wq, &rtwdev->txq_reinvoke_work, 1);
1605 }
1606 }
1607
rtw89_core_txq_reinvoke_work(struct work_struct * w)1608 static void rtw89_core_txq_reinvoke_work(struct work_struct *w)
1609 {
1610 struct rtw89_dev *rtwdev = container_of(w, struct rtw89_dev,
1611 txq_reinvoke_work.work);
1612
1613 queue_work(rtwdev->txq_wq, &rtwdev->txq_work);
1614 }
1615
rtw89_get_traffic_level(struct rtw89_dev * rtwdev,u32 throughput,u64 cnt)1616 static enum rtw89_tfc_lv rtw89_get_traffic_level(struct rtw89_dev *rtwdev,
1617 u32 throughput, u64 cnt)
1618 {
1619 if (cnt < 100)
1620 return RTW89_TFC_IDLE;
1621 if (throughput > 50)
1622 return RTW89_TFC_HIGH;
1623 if (throughput > 10)
1624 return RTW89_TFC_MID;
1625 if (throughput > 2)
1626 return RTW89_TFC_LOW;
1627 return RTW89_TFC_ULTRA_LOW;
1628 }
1629
rtw89_traffic_stats_calc(struct rtw89_dev * rtwdev,struct rtw89_traffic_stats * stats)1630 static bool rtw89_traffic_stats_calc(struct rtw89_dev *rtwdev,
1631 struct rtw89_traffic_stats *stats)
1632 {
1633 enum rtw89_tfc_lv tx_tfc_lv = stats->tx_tfc_lv;
1634 enum rtw89_tfc_lv rx_tfc_lv = stats->rx_tfc_lv;
1635
1636 stats->tx_throughput_raw = (u32)(stats->tx_unicast >> RTW89_TP_SHIFT);
1637 stats->rx_throughput_raw = (u32)(stats->rx_unicast >> RTW89_TP_SHIFT);
1638
1639 ewma_tp_add(&stats->tx_ewma_tp, stats->tx_throughput_raw);
1640 ewma_tp_add(&stats->rx_ewma_tp, stats->rx_throughput_raw);
1641
1642 stats->tx_throughput = ewma_tp_read(&stats->tx_ewma_tp);
1643 stats->rx_throughput = ewma_tp_read(&stats->rx_ewma_tp);
1644 stats->tx_tfc_lv = rtw89_get_traffic_level(rtwdev, stats->tx_throughput,
1645 stats->tx_cnt);
1646 stats->rx_tfc_lv = rtw89_get_traffic_level(rtwdev, stats->rx_throughput,
1647 stats->rx_cnt);
1648 stats->tx_avg_len = stats->tx_cnt ?
1649 DIV_ROUND_DOWN_ULL(stats->tx_unicast, stats->tx_cnt) : 0;
1650 stats->rx_avg_len = stats->rx_cnt ?
1651 DIV_ROUND_DOWN_ULL(stats->rx_unicast, stats->rx_cnt) : 0;
1652
1653 stats->tx_unicast = 0;
1654 stats->rx_unicast = 0;
1655 stats->tx_cnt = 0;
1656 stats->rx_cnt = 0;
1657
1658 if (tx_tfc_lv != stats->tx_tfc_lv || rx_tfc_lv != stats->rx_tfc_lv)
1659 return true;
1660
1661 return false;
1662 }
1663
rtw89_traffic_stats_track(struct rtw89_dev * rtwdev)1664 static bool rtw89_traffic_stats_track(struct rtw89_dev *rtwdev)
1665 {
1666 struct rtw89_vif *rtwvif;
1667 bool tfc_changed;
1668
1669 tfc_changed = rtw89_traffic_stats_calc(rtwdev, &rtwdev->stats);
1670 rtw89_for_each_rtwvif(rtwdev, rtwvif)
1671 rtw89_traffic_stats_calc(rtwdev, &rtwvif->stats);
1672
1673 return tfc_changed;
1674 }
1675
rtw89_vif_enter_lps(struct rtw89_dev * rtwdev,struct rtw89_vif * rtwvif)1676 static void rtw89_vif_enter_lps(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif)
1677 {
1678 if (rtwvif->wifi_role != RTW89_WIFI_ROLE_STATION)
1679 return;
1680
1681 if (rtwvif->stats.tx_tfc_lv == RTW89_TFC_IDLE &&
1682 rtwvif->stats.rx_tfc_lv == RTW89_TFC_IDLE)
1683 rtw89_enter_lps(rtwdev, rtwvif->mac_id);
1684 }
1685
rtw89_enter_lps_track(struct rtw89_dev * rtwdev)1686 static void rtw89_enter_lps_track(struct rtw89_dev *rtwdev)
1687 {
1688 struct rtw89_vif *rtwvif;
1689
1690 rtw89_for_each_rtwvif(rtwdev, rtwvif)
1691 rtw89_vif_enter_lps(rtwdev, rtwvif);
1692 }
1693
rtw89_traffic_stats_init(struct rtw89_dev * rtwdev,struct rtw89_traffic_stats * stats)1694 void rtw89_traffic_stats_init(struct rtw89_dev *rtwdev,
1695 struct rtw89_traffic_stats *stats)
1696 {
1697 stats->tx_unicast = 0;
1698 stats->rx_unicast = 0;
1699 stats->tx_cnt = 0;
1700 stats->rx_cnt = 0;
1701 ewma_tp_init(&stats->tx_ewma_tp);
1702 ewma_tp_init(&stats->rx_ewma_tp);
1703 }
1704
rtw89_track_work(struct work_struct * work)1705 static void rtw89_track_work(struct work_struct *work)
1706 {
1707 struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev,
1708 track_work.work);
1709 bool tfc_changed;
1710
1711 mutex_lock(&rtwdev->mutex);
1712
1713 if (!test_bit(RTW89_FLAG_RUNNING, rtwdev->flags))
1714 goto out;
1715
1716 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->track_work,
1717 RTW89_TRACK_WORK_PERIOD);
1718
1719 tfc_changed = rtw89_traffic_stats_track(rtwdev);
1720 if (rtwdev->scanning)
1721 goto out;
1722
1723 rtw89_leave_lps(rtwdev);
1724
1725 if (tfc_changed) {
1726 rtw89_hci_recalc_int_mit(rtwdev);
1727 rtw89_btc_ntfy_wl_sta(rtwdev);
1728 }
1729 rtw89_mac_bf_monitor_track(rtwdev);
1730 rtw89_phy_stat_track(rtwdev);
1731 rtw89_phy_env_monitor_track(rtwdev);
1732 rtw89_phy_dig(rtwdev);
1733 rtw89_chip_rfk_track(rtwdev);
1734 rtw89_phy_ra_update(rtwdev);
1735 rtw89_phy_cfo_track(rtwdev);
1736
1737 if (rtwdev->lps_enabled && !rtwdev->btc.lps)
1738 rtw89_enter_lps_track(rtwdev);
1739
1740 out:
1741 mutex_unlock(&rtwdev->mutex);
1742 }
1743
rtw89_core_acquire_bit_map(unsigned long * addr,unsigned long size)1744 u8 rtw89_core_acquire_bit_map(unsigned long *addr, unsigned long size)
1745 {
1746 unsigned long bit;
1747
1748 bit = find_first_zero_bit(addr, size);
1749 if (bit < size)
1750 set_bit(bit, addr);
1751
1752 return bit;
1753 }
1754
rtw89_core_release_bit_map(unsigned long * addr,u8 bit)1755 void rtw89_core_release_bit_map(unsigned long *addr, u8 bit)
1756 {
1757 clear_bit(bit, addr);
1758 }
1759
rtw89_core_release_all_bits_map(unsigned long * addr,unsigned int nbits)1760 void rtw89_core_release_all_bits_map(unsigned long *addr, unsigned int nbits)
1761 {
1762 bitmap_zero(addr, nbits);
1763 }
1764
1765 #define RTW89_TYPE_MAPPING(_type) \
1766 case NL80211_IFTYPE_ ## _type: \
1767 rtwvif->wifi_role = RTW89_WIFI_ROLE_ ## _type; \
1768 break
rtw89_vif_type_mapping(struct ieee80211_vif * vif,bool assoc)1769 void rtw89_vif_type_mapping(struct ieee80211_vif *vif, bool assoc)
1770 {
1771 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
1772
1773 switch (vif->type) {
1774 RTW89_TYPE_MAPPING(ADHOC);
1775 RTW89_TYPE_MAPPING(STATION);
1776 RTW89_TYPE_MAPPING(AP);
1777 RTW89_TYPE_MAPPING(MONITOR);
1778 RTW89_TYPE_MAPPING(MESH_POINT);
1779 default:
1780 WARN_ON(1);
1781 break;
1782 }
1783
1784 switch (vif->type) {
1785 case NL80211_IFTYPE_AP:
1786 case NL80211_IFTYPE_MESH_POINT:
1787 rtwvif->net_type = RTW89_NET_TYPE_AP_MODE;
1788 rtwvif->self_role = RTW89_SELF_ROLE_AP;
1789 break;
1790 case NL80211_IFTYPE_ADHOC:
1791 rtwvif->net_type = RTW89_NET_TYPE_AD_HOC;
1792 rtwvif->self_role = RTW89_SELF_ROLE_CLIENT;
1793 break;
1794 case NL80211_IFTYPE_STATION:
1795 if (assoc) {
1796 rtwvif->net_type = RTW89_NET_TYPE_INFRA;
1797 rtwvif->trigger = vif->bss_conf.he_support;
1798 } else {
1799 rtwvif->net_type = RTW89_NET_TYPE_NO_LINK;
1800 rtwvif->trigger = false;
1801 }
1802 rtwvif->self_role = RTW89_SELF_ROLE_CLIENT;
1803 rtwvif->addr_cam.sec_ent_mode = RTW89_ADDR_CAM_SEC_NORMAL;
1804 break;
1805 default:
1806 WARN_ON(1);
1807 break;
1808 }
1809 }
1810
rtw89_core_sta_add(struct rtw89_dev * rtwdev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1811 int rtw89_core_sta_add(struct rtw89_dev *rtwdev,
1812 struct ieee80211_vif *vif,
1813 struct ieee80211_sta *sta)
1814 {
1815 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
1816 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
1817 int i;
1818
1819 rtwsta->rtwvif = rtwvif;
1820 rtwsta->prev_rssi = 0;
1821
1822 for (i = 0; i < ARRAY_SIZE(sta->txq); i++)
1823 rtw89_core_txq_init(rtwdev, sta->txq[i]);
1824
1825 ewma_rssi_init(&rtwsta->avg_rssi);
1826
1827 if (vif->type == NL80211_IFTYPE_STATION) {
1828 rtwvif->mgd.ap = sta;
1829 rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta,
1830 BTC_ROLE_MSTS_STA_CONN_START);
1831 rtw89_chip_rfk_channel(rtwdev);
1832 }
1833
1834 return 0;
1835 }
1836
rtw89_core_sta_disassoc(struct rtw89_dev * rtwdev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1837 int rtw89_core_sta_disassoc(struct rtw89_dev *rtwdev,
1838 struct ieee80211_vif *vif,
1839 struct ieee80211_sta *sta)
1840 {
1841 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
1842
1843 rtwdev->total_sta_assoc--;
1844 rtwsta->disassoc = true;
1845
1846 return 0;
1847 }
1848
rtw89_core_sta_disconnect(struct rtw89_dev * rtwdev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1849 int rtw89_core_sta_disconnect(struct rtw89_dev *rtwdev,
1850 struct ieee80211_vif *vif,
1851 struct ieee80211_sta *sta)
1852 {
1853 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
1854 int ret;
1855
1856 rtw89_mac_bf_monitor_calc(rtwdev, sta, true);
1857 rtw89_mac_bf_disassoc(rtwdev, vif, sta);
1858 rtw89_core_free_sta_pending_ba(rtwdev, sta);
1859
1860 rtw89_vif_type_mapping(vif, false);
1861
1862 ret = rtw89_fw_h2c_assoc_cmac_tbl(rtwdev, vif, sta);
1863 if (ret) {
1864 rtw89_warn(rtwdev, "failed to send h2c cmac table\n");
1865 return ret;
1866 }
1867
1868 ret = rtw89_fw_h2c_join_info(rtwdev, rtwvif, 1);
1869 if (ret) {
1870 rtw89_warn(rtwdev, "failed to send h2c join info\n");
1871 return ret;
1872 }
1873
1874 /* update cam aid mac_id net_type */
1875 rtw89_fw_h2c_cam(rtwdev, rtwvif);
1876 if (ret) {
1877 rtw89_warn(rtwdev, "failed to send h2c cam\n");
1878 return ret;
1879 }
1880
1881 return ret;
1882 }
1883
rtw89_core_sta_assoc(struct rtw89_dev * rtwdev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1884 int rtw89_core_sta_assoc(struct rtw89_dev *rtwdev,
1885 struct ieee80211_vif *vif,
1886 struct ieee80211_sta *sta)
1887 {
1888 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
1889 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
1890 int ret;
1891
1892 rtw89_vif_type_mapping(vif, true);
1893
1894 ret = rtw89_fw_h2c_assoc_cmac_tbl(rtwdev, vif, sta);
1895 if (ret) {
1896 rtw89_warn(rtwdev, "failed to send h2c cmac table\n");
1897 return ret;
1898 }
1899
1900 /* for station mode, assign the mac_id from itself */
1901 if (vif->type == NL80211_IFTYPE_STATION)
1902 rtwsta->mac_id = rtwvif->mac_id;
1903
1904 ret = rtw89_fw_h2c_join_info(rtwdev, rtwvif, 0);
1905 if (ret) {
1906 rtw89_warn(rtwdev, "failed to send h2c join info\n");
1907 return ret;
1908 }
1909
1910 /* update cam aid mac_id net_type */
1911 rtw89_fw_h2c_cam(rtwdev, rtwvif);
1912 if (ret) {
1913 rtw89_warn(rtwdev, "failed to send h2c cam\n");
1914 return ret;
1915 }
1916
1917 ret = rtw89_fw_h2c_general_pkt(rtwdev, rtwsta->mac_id);
1918 if (ret) {
1919 rtw89_warn(rtwdev, "failed to send h2c general packet\n");
1920 return ret;
1921 }
1922
1923 rtwdev->total_sta_assoc++;
1924 rtw89_phy_ra_assoc(rtwdev, sta);
1925 rtw89_mac_bf_assoc(rtwdev, vif, sta);
1926 rtw89_mac_bf_monitor_calc(rtwdev, sta, false);
1927
1928 if (vif->type == NL80211_IFTYPE_STATION) {
1929 rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta,
1930 BTC_ROLE_MSTS_STA_CONN_END);
1931 rtw89_core_get_no_ul_ofdma_htc(rtwdev, &rtwsta->htc_template);
1932 }
1933
1934 return ret;
1935 }
1936
rtw89_core_sta_remove(struct rtw89_dev * rtwdev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1937 int rtw89_core_sta_remove(struct rtw89_dev *rtwdev,
1938 struct ieee80211_vif *vif,
1939 struct ieee80211_sta *sta)
1940 {
1941 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
1942 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
1943
1944 if (vif->type == NL80211_IFTYPE_STATION)
1945 rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta,
1946 BTC_ROLE_MSTS_STA_DIS_CONN);
1947
1948 return 0;
1949 }
1950
rtw89_init_ht_cap(struct rtw89_dev * rtwdev,struct ieee80211_sta_ht_cap * ht_cap)1951 static void rtw89_init_ht_cap(struct rtw89_dev *rtwdev,
1952 struct ieee80211_sta_ht_cap *ht_cap)
1953 {
1954 static const __le16 highest[RF_PATH_MAX] = {
1955 cpu_to_le16(150), cpu_to_le16(300), cpu_to_le16(450), cpu_to_le16(600),
1956 };
1957 struct rtw89_hal *hal = &rtwdev->hal;
1958 u8 nss = hal->rx_nss;
1959 int i;
1960
1961 ht_cap->ht_supported = true;
1962 ht_cap->cap = 0;
1963 ht_cap->cap |= IEEE80211_HT_CAP_SGI_20 |
1964 IEEE80211_HT_CAP_MAX_AMSDU |
1965 IEEE80211_HT_CAP_TX_STBC |
1966 (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
1967 ht_cap->cap |= IEEE80211_HT_CAP_LDPC_CODING;
1968 ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
1969 IEEE80211_HT_CAP_DSSSCCK40 |
1970 IEEE80211_HT_CAP_SGI_40;
1971 ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
1972 ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
1973 ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
1974 for (i = 0; i < nss; i++)
1975 ht_cap->mcs.rx_mask[i] = 0xFF;
1976 ht_cap->mcs.rx_mask[4] = 0x01;
1977 ht_cap->mcs.rx_highest = highest[nss - 1];
1978 }
1979
rtw89_init_vht_cap(struct rtw89_dev * rtwdev,struct ieee80211_sta_vht_cap * vht_cap)1980 static void rtw89_init_vht_cap(struct rtw89_dev *rtwdev,
1981 struct ieee80211_sta_vht_cap *vht_cap)
1982 {
1983 static const __le16 highest[RF_PATH_MAX] = {
1984 cpu_to_le16(433), cpu_to_le16(867), cpu_to_le16(1300), cpu_to_le16(1733),
1985 };
1986 struct rtw89_hal *hal = &rtwdev->hal;
1987 u16 tx_mcs_map = 0, rx_mcs_map = 0;
1988 u8 sts_cap = 3;
1989 int i;
1990
1991 for (i = 0; i < 8; i++) {
1992 if (i < hal->tx_nss)
1993 tx_mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << (i * 2);
1994 else
1995 tx_mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << (i * 2);
1996 if (i < hal->rx_nss)
1997 rx_mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << (i * 2);
1998 else
1999 rx_mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << (i * 2);
2000 }
2001
2002 vht_cap->vht_supported = true;
2003 vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
2004 IEEE80211_VHT_CAP_SHORT_GI_80 |
2005 IEEE80211_VHT_CAP_RXSTBC_1 |
2006 IEEE80211_VHT_CAP_HTC_VHT |
2007 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK |
2008 0;
2009 vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC;
2010 vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC;
2011 vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE |
2012 IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE;
2013 vht_cap->cap |= sts_cap << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT;
2014 vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(rx_mcs_map);
2015 vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(tx_mcs_map);
2016 vht_cap->vht_mcs.rx_highest = highest[hal->rx_nss - 1];
2017 vht_cap->vht_mcs.tx_highest = highest[hal->tx_nss - 1];
2018 }
2019
2020 #define RTW89_SBAND_IFTYPES_NR 2
2021
rtw89_init_he_cap(struct rtw89_dev * rtwdev,enum nl80211_band band,struct ieee80211_supported_band * sband)2022 static void rtw89_init_he_cap(struct rtw89_dev *rtwdev,
2023 enum nl80211_band band,
2024 struct ieee80211_supported_band *sband)
2025 {
2026 const struct rtw89_chip_info *chip = rtwdev->chip;
2027 struct rtw89_hal *hal = &rtwdev->hal;
2028 struct ieee80211_sband_iftype_data *iftype_data;
2029 bool no_ng16 = (chip->chip_id == RTL8852A && hal->cv == CHIP_CBV) ||
2030 (chip->chip_id == RTL8852B && hal->cv == CHIP_CAV);
2031 u16 mcs_map = 0;
2032 int i;
2033 int nss = hal->rx_nss;
2034 int idx = 0;
2035
2036 iftype_data = kcalloc(RTW89_SBAND_IFTYPES_NR, sizeof(*iftype_data), GFP_KERNEL);
2037 if (!iftype_data)
2038 return;
2039
2040 for (i = 0; i < 8; i++) {
2041 if (i < nss)
2042 mcs_map |= IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2);
2043 else
2044 mcs_map |= IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2);
2045 }
2046
2047 for (i = 0; i < NUM_NL80211_IFTYPES; i++) {
2048 struct ieee80211_sta_he_cap *he_cap;
2049 u8 *mac_cap_info;
2050 u8 *phy_cap_info;
2051
2052 switch (i) {
2053 case NL80211_IFTYPE_STATION:
2054 case NL80211_IFTYPE_AP:
2055 break;
2056 default:
2057 continue;
2058 }
2059
2060 if (idx >= RTW89_SBAND_IFTYPES_NR) {
2061 rtw89_warn(rtwdev, "run out of iftype_data\n");
2062 break;
2063 }
2064
2065 iftype_data[idx].types_mask = BIT(i);
2066 he_cap = &iftype_data[idx].he_cap;
2067 mac_cap_info = he_cap->he_cap_elem.mac_cap_info;
2068 phy_cap_info = he_cap->he_cap_elem.phy_cap_info;
2069
2070 he_cap->has_he = true;
2071 if (i == NL80211_IFTYPE_AP)
2072 mac_cap_info[0] = IEEE80211_HE_MAC_CAP0_HTC_HE;
2073 if (i == NL80211_IFTYPE_STATION)
2074 mac_cap_info[1] = IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US;
2075 mac_cap_info[2] = IEEE80211_HE_MAC_CAP2_ALL_ACK |
2076 IEEE80211_HE_MAC_CAP2_BSR;
2077 mac_cap_info[3] = IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_2;
2078 if (i == NL80211_IFTYPE_AP)
2079 mac_cap_info[3] |= IEEE80211_HE_MAC_CAP3_OMI_CONTROL;
2080 mac_cap_info[4] = IEEE80211_HE_MAC_CAP4_OPS |
2081 IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU;
2082 if (i == NL80211_IFTYPE_STATION)
2083 mac_cap_info[5] = IEEE80211_HE_MAC_CAP5_HT_VHT_TRIG_FRAME_RX;
2084 phy_cap_info[0] = IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G |
2085 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G;
2086 phy_cap_info[1] = IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A |
2087 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD |
2088 IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US;
2089 phy_cap_info[2] = IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US |
2090 IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ |
2091 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ |
2092 IEEE80211_HE_PHY_CAP2_DOPPLER_TX;
2093 phy_cap_info[3] = IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_16_QAM;
2094 if (i == NL80211_IFTYPE_STATION)
2095 phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_16_QAM |
2096 IEEE80211_HE_PHY_CAP3_DCM_MAX_TX_NSS_2;
2097 if (i == NL80211_IFTYPE_AP)
2098 phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_RX_PARTIAL_BW_SU_IN_20MHZ_MU;
2099 phy_cap_info[4] = IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE |
2100 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_4;
2101 phy_cap_info[5] = no_ng16 ? 0 :
2102 IEEE80211_HE_PHY_CAP5_NG16_SU_FEEDBACK |
2103 IEEE80211_HE_PHY_CAP5_NG16_MU_FEEDBACK;
2104 phy_cap_info[6] = IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_42_SU |
2105 IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_75_MU |
2106 IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB |
2107 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE;
2108 phy_cap_info[7] = IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP |
2109 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI |
2110 IEEE80211_HE_PHY_CAP7_MAX_NC_1;
2111 phy_cap_info[8] = IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI |
2112 IEEE80211_HE_PHY_CAP8_HE_ER_SU_1XLTF_AND_08_US_GI |
2113 IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_996;
2114 phy_cap_info[9] = IEEE80211_HE_PHY_CAP9_LONGER_THAN_16_SIGB_OFDM_SYM |
2115 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU |
2116 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB |
2117 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB |
2118 IEEE80211_HE_PHY_CAP9_NOMIMAL_PKT_PADDING_16US;
2119 if (i == NL80211_IFTYPE_STATION)
2120 phy_cap_info[9] |= IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU;
2121 he_cap->he_mcs_nss_supp.rx_mcs_80 = cpu_to_le16(mcs_map);
2122 he_cap->he_mcs_nss_supp.tx_mcs_80 = cpu_to_le16(mcs_map);
2123
2124 idx++;
2125 }
2126
2127 sband->iftype_data = iftype_data;
2128 sband->n_iftype_data = idx;
2129 }
2130
rtw89_core_set_supported_band(struct rtw89_dev * rtwdev)2131 static int rtw89_core_set_supported_band(struct rtw89_dev *rtwdev)
2132 {
2133 struct ieee80211_hw *hw = rtwdev->hw;
2134 struct ieee80211_supported_band *sband_2ghz = NULL, *sband_5ghz = NULL;
2135 u32 size = sizeof(struct ieee80211_supported_band);
2136
2137 sband_2ghz = kmemdup(&rtw89_sband_2ghz, size, GFP_KERNEL);
2138 if (!sband_2ghz)
2139 goto err;
2140 rtw89_init_ht_cap(rtwdev, &sband_2ghz->ht_cap);
2141 rtw89_init_he_cap(rtwdev, NL80211_BAND_2GHZ, sband_2ghz);
2142 hw->wiphy->bands[NL80211_BAND_2GHZ] = sband_2ghz;
2143
2144 sband_5ghz = kmemdup(&rtw89_sband_5ghz, size, GFP_KERNEL);
2145 if (!sband_5ghz)
2146 goto err;
2147 rtw89_init_ht_cap(rtwdev, &sband_5ghz->ht_cap);
2148 rtw89_init_vht_cap(rtwdev, &sband_5ghz->vht_cap);
2149 rtw89_init_he_cap(rtwdev, NL80211_BAND_5GHZ, sband_5ghz);
2150 hw->wiphy->bands[NL80211_BAND_5GHZ] = sband_5ghz;
2151
2152 return 0;
2153
2154 err:
2155 hw->wiphy->bands[NL80211_BAND_2GHZ] = NULL;
2156 hw->wiphy->bands[NL80211_BAND_5GHZ] = NULL;
2157 if (sband_2ghz)
2158 kfree(sband_2ghz->iftype_data);
2159 if (sband_5ghz)
2160 kfree(sband_5ghz->iftype_data);
2161 kfree(sband_2ghz);
2162 kfree(sband_5ghz);
2163 return -ENOMEM;
2164 }
2165
rtw89_core_clr_supported_band(struct rtw89_dev * rtwdev)2166 static void rtw89_core_clr_supported_band(struct rtw89_dev *rtwdev)
2167 {
2168 struct ieee80211_hw *hw = rtwdev->hw;
2169
2170 kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]->iftype_data);
2171 kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]->iftype_data);
2172 kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]);
2173 kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]);
2174 hw->wiphy->bands[NL80211_BAND_2GHZ] = NULL;
2175 hw->wiphy->bands[NL80211_BAND_5GHZ] = NULL;
2176 }
2177
rtw89_core_ppdu_sts_init(struct rtw89_dev * rtwdev)2178 static void rtw89_core_ppdu_sts_init(struct rtw89_dev *rtwdev)
2179 {
2180 int i;
2181
2182 for (i = 0; i < RTW89_PHY_MAX; i++)
2183 skb_queue_head_init(&rtwdev->ppdu_sts.rx_queue[i]);
2184 for (i = 0; i < RTW89_PHY_MAX; i++)
2185 rtwdev->ppdu_sts.curr_rx_ppdu_cnt[i] = U8_MAX;
2186 }
2187
rtw89_core_start(struct rtw89_dev * rtwdev)2188 int rtw89_core_start(struct rtw89_dev *rtwdev)
2189 {
2190 int ret;
2191
2192 rtwdev->mac.qta_mode = RTW89_QTA_SCC;
2193 ret = rtw89_mac_init(rtwdev);
2194 if (ret) {
2195 rtw89_err(rtwdev, "mac init fail, ret:%d\n", ret);
2196 return ret;
2197 }
2198
2199 rtw89_btc_ntfy_poweron(rtwdev);
2200
2201 /* efuse process */
2202
2203 /* pre-config BB/RF, BB reset/RFC reset */
2204 rtw89_mac_disable_bb_rf(rtwdev);
2205 rtw89_mac_enable_bb_rf(rtwdev);
2206 rtw89_phy_init_bb_reg(rtwdev);
2207 rtw89_phy_init_rf_reg(rtwdev);
2208
2209 rtw89_btc_ntfy_init(rtwdev, BTC_MODE_NORMAL);
2210
2211 rtw89_phy_dm_init(rtwdev);
2212
2213 rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, true);
2214 rtw89_mac_update_rts_threshold(rtwdev, RTW89_MAC_0);
2215
2216 ret = rtw89_hci_start(rtwdev);
2217 if (ret) {
2218 rtw89_err(rtwdev, "failed to start hci\n");
2219 return ret;
2220 }
2221
2222 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->track_work,
2223 RTW89_TRACK_WORK_PERIOD);
2224
2225 set_bit(RTW89_FLAG_RUNNING, rtwdev->flags);
2226
2227 rtw89_btc_ntfy_radio_state(rtwdev, BTC_RFCTRL_WL_ON);
2228 rtw89_fw_h2c_fw_log(rtwdev, rtwdev->fw.fw_log_enable);
2229
2230 return 0;
2231 }
2232
rtw89_core_stop(struct rtw89_dev * rtwdev)2233 void rtw89_core_stop(struct rtw89_dev *rtwdev)
2234 {
2235 struct rtw89_btc *btc = &rtwdev->btc;
2236
2237 /* Prvent to stop twice; enter_ips and ops_stop */
2238 if (!test_bit(RTW89_FLAG_RUNNING, rtwdev->flags))
2239 return;
2240
2241 rtw89_btc_ntfy_radio_state(rtwdev, BTC_RFCTRL_WL_OFF);
2242
2243 clear_bit(RTW89_FLAG_RUNNING, rtwdev->flags);
2244
2245 mutex_unlock(&rtwdev->mutex);
2246
2247 cancel_work_sync(&rtwdev->c2h_work);
2248 cancel_work_sync(&btc->eapol_notify_work);
2249 cancel_work_sync(&btc->arp_notify_work);
2250 cancel_work_sync(&btc->dhcp_notify_work);
2251 cancel_work_sync(&btc->icmp_notify_work);
2252 cancel_delayed_work_sync(&rtwdev->txq_reinvoke_work);
2253 cancel_delayed_work_sync(&rtwdev->track_work);
2254 cancel_delayed_work_sync(&rtwdev->coex_act1_work);
2255 cancel_delayed_work_sync(&rtwdev->coex_bt_devinfo_work);
2256 cancel_delayed_work_sync(&rtwdev->coex_rfk_chk_work);
2257 cancel_delayed_work_sync(&rtwdev->cfo_track_work);
2258
2259 mutex_lock(&rtwdev->mutex);
2260
2261 rtw89_btc_ntfy_poweroff(rtwdev);
2262 rtw89_hci_flush_queues(rtwdev, BIT(rtwdev->hw->queues) - 1, true);
2263 rtw89_mac_flush_txq(rtwdev, BIT(rtwdev->hw->queues) - 1, true);
2264 rtw89_hci_stop(rtwdev);
2265 rtw89_hci_deinit(rtwdev);
2266 rtw89_mac_pwr_off(rtwdev);
2267 rtw89_hci_reset(rtwdev);
2268 }
2269
rtw89_core_init(struct rtw89_dev * rtwdev)2270 int rtw89_core_init(struct rtw89_dev *rtwdev)
2271 {
2272 struct rtw89_btc *btc = &rtwdev->btc;
2273 int ret;
2274
2275 INIT_LIST_HEAD(&rtwdev->ba_list);
2276 INIT_LIST_HEAD(&rtwdev->rtwvifs_list);
2277 INIT_LIST_HEAD(&rtwdev->early_h2c_list);
2278 INIT_WORK(&rtwdev->ba_work, rtw89_core_ba_work);
2279 INIT_WORK(&rtwdev->txq_work, rtw89_core_txq_work);
2280 INIT_DELAYED_WORK(&rtwdev->txq_reinvoke_work, rtw89_core_txq_reinvoke_work);
2281 INIT_DELAYED_WORK(&rtwdev->track_work, rtw89_track_work);
2282 INIT_DELAYED_WORK(&rtwdev->coex_act1_work, rtw89_coex_act1_work);
2283 INIT_DELAYED_WORK(&rtwdev->coex_bt_devinfo_work, rtw89_coex_bt_devinfo_work);
2284 INIT_DELAYED_WORK(&rtwdev->coex_rfk_chk_work, rtw89_coex_rfk_chk_work);
2285 INIT_DELAYED_WORK(&rtwdev->cfo_track_work, rtw89_phy_cfo_track_work);
2286 rtwdev->txq_wq = alloc_workqueue("rtw89_tx_wq", WQ_UNBOUND | WQ_HIGHPRI, 0);
2287 spin_lock_init(&rtwdev->ba_lock);
2288 mutex_init(&rtwdev->mutex);
2289 mutex_init(&rtwdev->rf_mutex);
2290 rtwdev->total_sta_assoc = 0;
2291
2292 INIT_WORK(&rtwdev->c2h_work, rtw89_fw_c2h_work);
2293 skb_queue_head_init(&rtwdev->c2h_queue);
2294 rtw89_core_ppdu_sts_init(rtwdev);
2295 rtw89_traffic_stats_init(rtwdev, &rtwdev->stats);
2296
2297 rtwdev->ps_mode = rtw89_update_ps_mode(rtwdev);
2298 rtwdev->hal.rx_fltr = DEFAULT_AX_RX_FLTR;
2299
2300 INIT_WORK(&btc->eapol_notify_work, rtw89_btc_ntfy_eapol_packet_work);
2301 INIT_WORK(&btc->arp_notify_work, rtw89_btc_ntfy_arp_packet_work);
2302 INIT_WORK(&btc->dhcp_notify_work, rtw89_btc_ntfy_dhcp_packet_work);
2303 INIT_WORK(&btc->icmp_notify_work, rtw89_btc_ntfy_icmp_packet_work);
2304
2305 ret = rtw89_load_firmware(rtwdev);
2306 if (ret) {
2307 rtw89_warn(rtwdev, "no firmware loaded\n");
2308 return ret;
2309 }
2310 rtw89_ser_init(rtwdev);
2311
2312 return 0;
2313 }
2314 EXPORT_SYMBOL(rtw89_core_init);
2315
rtw89_core_deinit(struct rtw89_dev * rtwdev)2316 void rtw89_core_deinit(struct rtw89_dev *rtwdev)
2317 {
2318 rtw89_ser_deinit(rtwdev);
2319 rtw89_unload_firmware(rtwdev);
2320 rtw89_fw_free_all_early_h2c(rtwdev);
2321
2322 destroy_workqueue(rtwdev->txq_wq);
2323 mutex_destroy(&rtwdev->rf_mutex);
2324 mutex_destroy(&rtwdev->mutex);
2325 }
2326 EXPORT_SYMBOL(rtw89_core_deinit);
2327
rtw89_read_chip_ver(struct rtw89_dev * rtwdev)2328 static void rtw89_read_chip_ver(struct rtw89_dev *rtwdev)
2329 {
2330 u8 cv;
2331
2332 cv = rtw89_read32_mask(rtwdev, R_AX_SYS_CFG1, B_AX_CHIP_VER_MASK);
2333 if (cv <= CHIP_CBV) {
2334 if (rtw89_read32(rtwdev, R_AX_GPIO0_7_FUNC_SEL) == RTW89_R32_DEAD)
2335 cv = CHIP_CAV;
2336 else
2337 cv = CHIP_CBV;
2338 }
2339
2340 rtwdev->hal.cv = cv;
2341 }
2342
rtw89_chip_efuse_info_setup(struct rtw89_dev * rtwdev)2343 static int rtw89_chip_efuse_info_setup(struct rtw89_dev *rtwdev)
2344 {
2345 int ret;
2346
2347 ret = rtw89_mac_partial_init(rtwdev);
2348 if (ret)
2349 return ret;
2350
2351 ret = rtw89_parse_efuse_map(rtwdev);
2352 if (ret)
2353 return ret;
2354
2355 ret = rtw89_parse_phycap_map(rtwdev);
2356 if (ret)
2357 return ret;
2358
2359 ret = rtw89_mac_setup_phycap(rtwdev);
2360 if (ret)
2361 return ret;
2362
2363 rtw89_mac_pwr_off(rtwdev);
2364
2365 return 0;
2366 }
2367
rtw89_chip_board_info_setup(struct rtw89_dev * rtwdev)2368 static int rtw89_chip_board_info_setup(struct rtw89_dev *rtwdev)
2369 {
2370 rtw89_chip_fem_setup(rtwdev);
2371
2372 return 0;
2373 }
2374
rtw89_chip_info_setup(struct rtw89_dev * rtwdev)2375 int rtw89_chip_info_setup(struct rtw89_dev *rtwdev)
2376 {
2377 int ret;
2378
2379 rtw89_read_chip_ver(rtwdev);
2380
2381 ret = rtw89_wait_firmware_completion(rtwdev);
2382 if (ret) {
2383 rtw89_err(rtwdev, "failed to wait firmware completion\n");
2384 return ret;
2385 }
2386
2387 ret = rtw89_fw_recognize(rtwdev);
2388 if (ret) {
2389 rtw89_err(rtwdev, "failed to recognize firmware\n");
2390 return ret;
2391 }
2392
2393 ret = rtw89_chip_efuse_info_setup(rtwdev);
2394 if (ret)
2395 return ret;
2396
2397 ret = rtw89_chip_board_info_setup(rtwdev);
2398 if (ret)
2399 return ret;
2400
2401 return 0;
2402 }
2403 EXPORT_SYMBOL(rtw89_chip_info_setup);
2404
rtw89_core_register_hw(struct rtw89_dev * rtwdev)2405 static int rtw89_core_register_hw(struct rtw89_dev *rtwdev)
2406 {
2407 struct ieee80211_hw *hw = rtwdev->hw;
2408 struct rtw89_efuse *efuse = &rtwdev->efuse;
2409 int ret;
2410 int tx_headroom = IEEE80211_HT_CTL_LEN;
2411
2412 hw->vif_data_size = sizeof(struct rtw89_vif);
2413 hw->sta_data_size = sizeof(struct rtw89_sta);
2414 hw->txq_data_size = sizeof(struct rtw89_txq);
2415
2416 SET_IEEE80211_PERM_ADDR(hw, efuse->addr);
2417
2418 hw->extra_tx_headroom = tx_headroom;
2419 hw->queues = IEEE80211_NUM_ACS;
2420 hw->max_rx_aggregation_subframes = RTW89_MAX_RX_AGG_NUM;
2421 hw->max_tx_aggregation_subframes = RTW89_MAX_TX_AGG_NUM;
2422
2423 ieee80211_hw_set(hw, SIGNAL_DBM);
2424 ieee80211_hw_set(hw, HAS_RATE_CONTROL);
2425 ieee80211_hw_set(hw, MFP_CAPABLE);
2426 ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS);
2427 ieee80211_hw_set(hw, AMPDU_AGGREGATION);
2428 ieee80211_hw_set(hw, RX_INCLUDES_FCS);
2429 ieee80211_hw_set(hw, TX_AMSDU);
2430 ieee80211_hw_set(hw, SUPPORT_FAST_XMIT);
2431 ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU);
2432 ieee80211_hw_set(hw, SUPPORTS_PS);
2433 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
2434
2435 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
2436 hw->wiphy->available_antennas_tx = BIT(rtwdev->chip->rf_path_num) - 1;
2437 hw->wiphy->available_antennas_rx = BIT(rtwdev->chip->rf_path_num) - 1;
2438
2439 hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR;
2440
2441 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0);
2442
2443 ret = rtw89_core_set_supported_band(rtwdev);
2444 if (ret) {
2445 rtw89_err(rtwdev, "failed to set supported band\n");
2446 return ret;
2447 }
2448
2449 hw->wiphy->reg_notifier = rtw89_regd_notifier;
2450 hw->wiphy->sar_capa = &rtw89_sar_capa;
2451
2452 ret = ieee80211_register_hw(hw);
2453 if (ret) {
2454 rtw89_err(rtwdev, "failed to register hw\n");
2455 goto err;
2456 }
2457
2458 ret = rtw89_regd_init(rtwdev, rtw89_regd_notifier);
2459 if (ret) {
2460 rtw89_err(rtwdev, "failed to init regd\n");
2461 goto err;
2462 }
2463
2464 return 0;
2465
2466 err:
2467 return ret;
2468 }
2469
rtw89_core_unregister_hw(struct rtw89_dev * rtwdev)2470 static void rtw89_core_unregister_hw(struct rtw89_dev *rtwdev)
2471 {
2472 struct ieee80211_hw *hw = rtwdev->hw;
2473
2474 ieee80211_unregister_hw(hw);
2475 rtw89_core_clr_supported_band(rtwdev);
2476 }
2477
rtw89_core_register(struct rtw89_dev * rtwdev)2478 int rtw89_core_register(struct rtw89_dev *rtwdev)
2479 {
2480 int ret;
2481
2482 ret = rtw89_core_register_hw(rtwdev);
2483 if (ret) {
2484 rtw89_err(rtwdev, "failed to register core hw\n");
2485 return ret;
2486 }
2487
2488 rtw89_debugfs_init(rtwdev);
2489
2490 return 0;
2491 }
2492 EXPORT_SYMBOL(rtw89_core_register);
2493
rtw89_core_unregister(struct rtw89_dev * rtwdev)2494 void rtw89_core_unregister(struct rtw89_dev *rtwdev)
2495 {
2496 rtw89_core_unregister_hw(rtwdev);
2497 }
2498 EXPORT_SYMBOL(rtw89_core_unregister);
2499
2500 MODULE_AUTHOR("Realtek Corporation");
2501 MODULE_DESCRIPTION("Realtek 802.11ax wireless core module");
2502 MODULE_LICENSE("Dual BSD/GPL");
2503