1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * SPI interface.
4 *
5 * Copyright (c) 2017-2020, Silicon Laboratories, Inc.
6 * Copyright (c) 2011, Sagrad Inc.
7 * Copyright (c) 2010, ST-Ericsson
8 */
9 #include <linux/module.h>
10 #include <linux/delay.h>
11 #include <linux/gpio/consumer.h>
12 #include <linux/spi/spi.h>
13 #include <linux/interrupt.h>
14 #include <linux/irq.h>
15 #include <linux/of.h>
16
17 #include "bus.h"
18 #include "wfx.h"
19 #include "hwio.h"
20 #include "main.h"
21 #include "bh.h"
22
23 #define SET_WRITE 0x7FFF /* usage: and operation */
24 #define SET_READ 0x8000 /* usage: or operation */
25
26 #define WFX_RESET_INVERTED 1
27
28 static const struct wfx_platform_data wfx_spi_pdata = {
29 .file_fw = "wfm_wf200",
30 .file_pds = "wf200.pds",
31 .use_rising_clk = true,
32 };
33
34 struct wfx_spi_priv {
35 struct spi_device *func;
36 struct wfx_dev *core;
37 struct gpio_desc *gpio_reset;
38 bool need_swab;
39 };
40
41 /* The chip reads 16bits of data at time and place them directly into (little
42 * endian) CPU register. So, the chip expects bytes order to be "B1 B0 B3 B2"
43 * (while LE is "B0 B1 B2 B3" and BE is "B3 B2 B1 B0")
44 *
45 * A little endian host with bits_per_word == 16 should do the right job
46 * natively. The code below to support big endian host and commonly used SPI
47 * 8bits.
48 */
wfx_spi_copy_from_io(void * priv,unsigned int addr,void * dst,size_t count)49 static int wfx_spi_copy_from_io(void *priv, unsigned int addr,
50 void *dst, size_t count)
51 {
52 struct wfx_spi_priv *bus = priv;
53 u16 regaddr = (addr << 12) | (count / 2) | SET_READ;
54 struct spi_message m;
55 struct spi_transfer t_addr = {
56 .tx_buf = ®addr,
57 .len = sizeof(regaddr),
58 };
59 struct spi_transfer t_msg = {
60 .rx_buf = dst,
61 .len = count,
62 };
63 u16 *dst16 = dst;
64 int ret, i;
65
66 WARN(count % 2, "buffer size must be a multiple of 2");
67
68 cpu_to_le16s(®addr);
69 if (bus->need_swab)
70 swab16s(®addr);
71
72 spi_message_init(&m);
73 spi_message_add_tail(&t_addr, &m);
74 spi_message_add_tail(&t_msg, &m);
75 ret = spi_sync(bus->func, &m);
76
77 if (bus->need_swab && addr == WFX_REG_CONFIG)
78 for (i = 0; i < count / 2; i++)
79 swab16s(&dst16[i]);
80 return ret;
81 }
82
wfx_spi_copy_to_io(void * priv,unsigned int addr,const void * src,size_t count)83 static int wfx_spi_copy_to_io(void *priv, unsigned int addr,
84 const void *src, size_t count)
85 {
86 struct wfx_spi_priv *bus = priv;
87 u16 regaddr = (addr << 12) | (count / 2);
88 /* FIXME: use a bounce buffer */
89 u16 *src16 = (void *)src;
90 int ret, i;
91 struct spi_message m;
92 struct spi_transfer t_addr = {
93 .tx_buf = ®addr,
94 .len = sizeof(regaddr),
95 };
96 struct spi_transfer t_msg = {
97 .tx_buf = src,
98 .len = count,
99 };
100
101 WARN(count % 2, "buffer size must be a multiple of 2");
102 WARN(regaddr & SET_READ, "bad addr or size overflow");
103
104 cpu_to_le16s(®addr);
105
106 /* Register address and CONFIG content always use 16bit big endian
107 * ("BADC" order)
108 */
109 if (bus->need_swab)
110 swab16s(®addr);
111 if (bus->need_swab && addr == WFX_REG_CONFIG)
112 for (i = 0; i < count / 2; i++)
113 swab16s(&src16[i]);
114
115 spi_message_init(&m);
116 spi_message_add_tail(&t_addr, &m);
117 spi_message_add_tail(&t_msg, &m);
118 ret = spi_sync(bus->func, &m);
119
120 if (bus->need_swab && addr == WFX_REG_CONFIG)
121 for (i = 0; i < count / 2; i++)
122 swab16s(&src16[i]);
123 return ret;
124 }
125
wfx_spi_lock(void * priv)126 static void wfx_spi_lock(void *priv)
127 {
128 }
129
wfx_spi_unlock(void * priv)130 static void wfx_spi_unlock(void *priv)
131 {
132 }
133
wfx_spi_irq_handler(int irq,void * priv)134 static irqreturn_t wfx_spi_irq_handler(int irq, void *priv)
135 {
136 struct wfx_spi_priv *bus = priv;
137
138 wfx_bh_request_rx(bus->core);
139 return IRQ_HANDLED;
140 }
141
wfx_spi_irq_subscribe(void * priv)142 static int wfx_spi_irq_subscribe(void *priv)
143 {
144 struct wfx_spi_priv *bus = priv;
145 u32 flags;
146
147 flags = irq_get_trigger_type(bus->func->irq);
148 if (!flags)
149 flags = IRQF_TRIGGER_HIGH;
150 flags |= IRQF_ONESHOT;
151 return devm_request_threaded_irq(&bus->func->dev, bus->func->irq, NULL,
152 wfx_spi_irq_handler, IRQF_ONESHOT,
153 "wfx", bus);
154 }
155
wfx_spi_irq_unsubscribe(void * priv)156 static int wfx_spi_irq_unsubscribe(void *priv)
157 {
158 struct wfx_spi_priv *bus = priv;
159
160 devm_free_irq(&bus->func->dev, bus->func->irq, bus);
161 return 0;
162 }
163
wfx_spi_align_size(void * priv,size_t size)164 static size_t wfx_spi_align_size(void *priv, size_t size)
165 {
166 /* Most of SPI controllers avoid DMA if buffer size is not 32bit aligned
167 */
168 return ALIGN(size, 4);
169 }
170
171 static const struct hwbus_ops wfx_spi_hwbus_ops = {
172 .copy_from_io = wfx_spi_copy_from_io,
173 .copy_to_io = wfx_spi_copy_to_io,
174 .irq_subscribe = wfx_spi_irq_subscribe,
175 .irq_unsubscribe = wfx_spi_irq_unsubscribe,
176 .lock = wfx_spi_lock,
177 .unlock = wfx_spi_unlock,
178 .align_size = wfx_spi_align_size,
179 };
180
wfx_spi_probe(struct spi_device * func)181 static int wfx_spi_probe(struct spi_device *func)
182 {
183 struct wfx_spi_priv *bus;
184 int ret;
185
186 if (!func->bits_per_word)
187 func->bits_per_word = 16;
188 ret = spi_setup(func);
189 if (ret)
190 return ret;
191 /* Trace below is also displayed by spi_setup() if compiled with DEBUG */
192 dev_dbg(&func->dev, "SPI params: CS=%d, mode=%d bits/word=%d speed=%d\n",
193 func->chip_select, func->mode, func->bits_per_word,
194 func->max_speed_hz);
195 if (func->bits_per_word != 16 && func->bits_per_word != 8)
196 dev_warn(&func->dev, "unusual bits/word value: %d\n",
197 func->bits_per_word);
198 if (func->max_speed_hz > 50000000)
199 dev_warn(&func->dev, "%dHz is a very high speed\n",
200 func->max_speed_hz);
201
202 bus = devm_kzalloc(&func->dev, sizeof(*bus), GFP_KERNEL);
203 if (!bus)
204 return -ENOMEM;
205 bus->func = func;
206 if (func->bits_per_word == 8 || IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
207 bus->need_swab = true;
208 spi_set_drvdata(func, bus);
209
210 bus->gpio_reset = devm_gpiod_get_optional(&func->dev, "reset",
211 GPIOD_OUT_LOW);
212 if (IS_ERR(bus->gpio_reset))
213 return PTR_ERR(bus->gpio_reset);
214 if (!bus->gpio_reset) {
215 dev_warn(&func->dev,
216 "gpio reset is not defined, trying to load firmware anyway\n");
217 } else {
218 gpiod_set_consumer_name(bus->gpio_reset, "wfx reset");
219 if (spi_get_device_id(func)->driver_data & WFX_RESET_INVERTED)
220 gpiod_toggle_active_low(bus->gpio_reset);
221 gpiod_set_value_cansleep(bus->gpio_reset, 1);
222 usleep_range(100, 150);
223 gpiod_set_value_cansleep(bus->gpio_reset, 0);
224 usleep_range(2000, 2500);
225 }
226
227 bus->core = wfx_init_common(&func->dev, &wfx_spi_pdata,
228 &wfx_spi_hwbus_ops, bus);
229 if (!bus->core)
230 return -EIO;
231
232 return wfx_probe(bus->core);
233 }
234
wfx_spi_remove(struct spi_device * func)235 static int wfx_spi_remove(struct spi_device *func)
236 {
237 struct wfx_spi_priv *bus = spi_get_drvdata(func);
238
239 wfx_release(bus->core);
240 return 0;
241 }
242
243 /* For dynamic driver binding, kernel does not use OF to match driver. It only
244 * use modalias and modalias is a copy of 'compatible' DT node with vendor
245 * stripped.
246 */
247 static const struct spi_device_id wfx_spi_id[] = {
248 { "wfx-spi", WFX_RESET_INVERTED },
249 { "wf200", 0 },
250 { },
251 };
252 MODULE_DEVICE_TABLE(spi, wfx_spi_id);
253
254 #ifdef CONFIG_OF
255 static const struct of_device_id wfx_spi_of_match[] = {
256 { .compatible = "silabs,wfx-spi", .data = (void *)WFX_RESET_INVERTED },
257 { .compatible = "silabs,wf200" },
258 { },
259 };
260 MODULE_DEVICE_TABLE(of, wfx_spi_of_match);
261 #endif
262
263 struct spi_driver wfx_spi_driver = {
264 .driver = {
265 .name = "wfx-spi",
266 .of_match_table = of_match_ptr(wfx_spi_of_match),
267 },
268 .id_table = wfx_spi_id,
269 .probe = wfx_spi_probe,
270 .remove = wfx_spi_remove,
271 };
272