Lines Matching refs:mcr
51 mcr p15, 0, r0, c1, c0, 0 @ disable caches
63 mcr p15, 0, ip, c7, c0, 0 @ invalidate cache
66 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
74 mcr p15, 0, r0, c7, c0, 0 @ invalidate caches
76 mcr p15, 0, r0, c6, c3 @ disable area 3~7
77 mcr p15, 0, r0, c6, c4
78 mcr p15, 0, r0, c6, c5
79 mcr p15, 0, r0, c6, c6
80 mcr p15, 0, r0, c6, c7
83 mcr p15, 0, r0, c6, c0 @ set area 0, default
93 mcr p15, 0, r0, c6, c1 @ set area 1, RAM
106 2: mcr p15, 0, r0, c6, c2 @ set area 2, ROM/FLASH
109 mcr p15, 0, r0, c2, c0 @ Region 1&2 cacheable
115 mcr p15, 0, r0, c3, c0
119 mcr p15, 0, r0, c5, c0 @ all read/write access