Lines Matching refs:msi_data
51 struct fsl_msi *msi_data; member
71 struct fsl_msi *msi_data = irqd->domain->host_data; in fsl_msi_print_chip() local
75 srs = (hwirq >> msi_data->srs_shift) & MSI_SRS_MASK; in fsl_msi_print_chip()
76 cascade_virq = msi_data->cascade_array[srs]->virq; in fsl_msi_print_chip()
92 struct fsl_msi *msi_data = h->host_data; in fsl_msi_host_map() local
97 irq_set_chip_data(virq, msi_data); in fsl_msi_host_map()
107 static int fsl_msi_init_allocator(struct fsl_msi *msi_data) in fsl_msi_init_allocator() argument
111 rc = msi_bitmap_alloc(&msi_data->bitmap, NR_MSI_IRQS_MAX, in fsl_msi_init_allocator()
112 irq_domain_get_of_node(msi_data->irqhost)); in fsl_msi_init_allocator()
121 msi_bitmap_reserve_hwirq(&msi_data->bitmap, hwirq); in fsl_msi_init_allocator()
129 struct fsl_msi *msi_data; in fsl_teardown_msi_irqs() local
134 msi_data = irq_get_chip_data(entry->irq); in fsl_teardown_msi_irqs()
138 msi_bitmap_free_hwirqs(&msi_data->bitmap, hwirq, 1); in fsl_teardown_msi_irqs()
146 struct fsl_msi *msi_data = fsl_msi_data; in fsl_compose_msi_msg() local
157 address = fsl_pci_immrbar_base(hose) + msi_data->msiir_offset; in fsl_compose_msi_msg()
169 if (msi_data->feature & MSI_HW_ERRATA_ENDIAN) in fsl_compose_msi_msg()
175 (hwirq >> msi_data->srs_shift) & MSI_SRS_MASK, in fsl_compose_msi_msg()
176 (hwirq >> msi_data->ibs_shift) & MSI_IBS_MASK); in fsl_compose_msi_msg()
188 struct fsl_msi *msi_data; in fsl_setup_msi_irqs() local
196 list_for_each_entry(msi_data, &msi_head, list) in fsl_setup_msi_irqs()
197 if (msi_data->feature & MSI_HW_ERRATA_ENDIAN) in fsl_setup_msi_irqs()
226 list_for_each_entry(msi_data, &msi_head, list) { in fsl_setup_msi_irqs()
235 if (phandle && (phandle != msi_data->phandle)) in fsl_setup_msi_irqs()
238 hwirq = msi_bitmap_alloc_hwirqs(&msi_data->bitmap, 1); in fsl_setup_msi_irqs()
249 virq = irq_create_mapping(msi_data->irqhost, hwirq); in fsl_setup_msi_irqs()
253 msi_bitmap_free_hwirqs(&msi_data->bitmap, hwirq, 1); in fsl_setup_msi_irqs()
260 fsl_compose_msi_msg(pdev, hwirq, &msg, msi_data); in fsl_setup_msi_irqs()
272 struct fsl_msi *msi_data; in fsl_msi_cascade() local
280 msi_data = cascade_data->msi_data; in fsl_msi_cascade()
284 switch (msi_data->feature & FSL_PIC_IP_MASK) { in fsl_msi_cascade()
286 msir_value = fsl_msi_read(msi_data->msi_regs, in fsl_msi_cascade()
290 msir_value = fsl_msi_read(msi_data->msi_regs, msir_index * 0x4); in fsl_msi_cascade()
310 err = generic_handle_domain_irq(msi_data->irqhost, in fsl_msi_cascade()
311 msi_hwirq(msi_data, msir_index, in fsl_msi_cascade()
372 cascade_data->msi_data = msi; in fsl_msi_setup_hwirq()