Lines Matching refs:reg_read
545 return address_mask(ctxt, reg_read(ctxt, reg)); in register_address()
1218 unsigned bx = reg_read(ctxt, VCPU_REGS_RBX); in decode_modrm()
1219 unsigned bp = reg_read(ctxt, VCPU_REGS_RBP); in decode_modrm()
1220 unsigned si = reg_read(ctxt, VCPU_REGS_RSI); in decode_modrm()
1221 unsigned di = reg_read(ctxt, VCPU_REGS_RDI); in decode_modrm()
1278 modrm_ea += reg_read(ctxt, base_reg); in decode_modrm()
1286 modrm_ea += reg_read(ctxt, index_reg) << scale; in decode_modrm()
1293 modrm_ea += reg_read(ctxt, base_reg); in decode_modrm()
1434 address_mask(ctxt, reg_read(ctxt, VCPU_REGS_RCX)) : 1; in pio_in_emulated()
1436 offset_in_page(reg_read(ctxt, VCPU_REGS_RDI)) : in pio_in_emulated()
1437 PAGE_SIZE - offset_in_page(reg_read(ctxt, VCPU_REGS_RDI)); in pio_in_emulated()
1828 addr.ea = reg_read(ctxt, VCPU_REGS_RSP) & stack_mask(ctxt); in emulate_push()
1847 addr.ea = reg_read(ctxt, VCPU_REGS_RSP) & stack_mask(ctxt); in emulate_pop()
1923 rbp = reg_read(ctxt, VCPU_REGS_RBP); in em_enter()
1927 assign_masked(reg_rmw(ctxt, VCPU_REGS_RBP), reg_read(ctxt, VCPU_REGS_RSP), in em_enter()
1930 reg_read(ctxt, VCPU_REGS_RSP) - frame_size, in em_enter()
1937 assign_masked(reg_rmw(ctxt, VCPU_REGS_RSP), reg_read(ctxt, VCPU_REGS_RBP), in em_leave()
1976 unsigned long old_esp = reg_read(ctxt, VCPU_REGS_RSP); in em_pusha()
1982 (ctxt->src.val = old_esp) : (ctxt->src.val = reg_read(ctxt, reg)); in em_pusha()
2216 if (((u32) (old >> 0) != (u32) reg_read(ctxt, VCPU_REGS_RAX)) || in em_cmpxchg8b()
2217 ((u32) (old >> 32) != (u32) reg_read(ctxt, VCPU_REGS_RDX))) { in em_cmpxchg8b()
2222 ctxt->dst.val64 = ((u64)reg_read(ctxt, VCPU_REGS_RCX) << 32) | in em_cmpxchg8b()
2223 (u32) reg_read(ctxt, VCPU_REGS_RBX); in em_cmpxchg8b()
2284 ctxt->dst.val = reg_read(ctxt, VCPU_REGS_RAX); in em_cmpxchg()
2497 rcx = reg_read(ctxt, VCPU_REGS_RCX); in em_sysexit()
2498 rdx = reg_read(ctxt, VCPU_REGS_RDX); in em_sysexit()
2643 tss->ax = reg_read(ctxt, VCPU_REGS_RAX); in save_state_to_tss16()
2644 tss->cx = reg_read(ctxt, VCPU_REGS_RCX); in save_state_to_tss16()
2645 tss->dx = reg_read(ctxt, VCPU_REGS_RDX); in save_state_to_tss16()
2646 tss->bx = reg_read(ctxt, VCPU_REGS_RBX); in save_state_to_tss16()
2647 tss->sp = reg_read(ctxt, VCPU_REGS_RSP); in save_state_to_tss16()
2648 tss->bp = reg_read(ctxt, VCPU_REGS_RBP); in save_state_to_tss16()
2649 tss->si = reg_read(ctxt, VCPU_REGS_RSI); in save_state_to_tss16()
2650 tss->di = reg_read(ctxt, VCPU_REGS_RDI); in save_state_to_tss16()
2756 tss->eax = reg_read(ctxt, VCPU_REGS_RAX); in save_state_to_tss32()
2757 tss->ecx = reg_read(ctxt, VCPU_REGS_RCX); in save_state_to_tss32()
2758 tss->edx = reg_read(ctxt, VCPU_REGS_RDX); in save_state_to_tss32()
2759 tss->ebx = reg_read(ctxt, VCPU_REGS_RBX); in save_state_to_tss32()
2760 tss->esp = reg_read(ctxt, VCPU_REGS_RSP); in save_state_to_tss32()
2761 tss->ebp = reg_read(ctxt, VCPU_REGS_RBP); in save_state_to_tss32()
2762 tss->esi = reg_read(ctxt, VCPU_REGS_RSI); in save_state_to_tss32()
2763 tss->edi = reg_read(ctxt, VCPU_REGS_RDI); in save_state_to_tss32()
3226 if (ctxt->ops->read_pmc(ctxt, reg_read(ctxt, VCPU_REGS_RCX), &pmc)) in em_rdpmc()
3316 u64 msr_index = reg_read(ctxt, VCPU_REGS_RCX); in em_wrmsr()
3320 msr_data = (u32)reg_read(ctxt, VCPU_REGS_RAX) in em_wrmsr()
3321 | ((u64)reg_read(ctxt, VCPU_REGS_RDX) << 32); in em_wrmsr()
3332 u64 msr_index = reg_read(ctxt, VCPU_REGS_RCX); in em_rdmsr()
3543 if ((address_mask(ctxt, reg_read(ctxt, VCPU_REGS_RCX)) != 0) && in em_loop()
3554 if (address_mask(ctxt, reg_read(ctxt, VCPU_REGS_RCX)) == 0) in em_jcxz()
3608 eax = reg_read(ctxt, VCPU_REGS_RAX); in em_cpuid()
3609 ecx = reg_read(ctxt, VCPU_REGS_RCX); in em_cpuid()
3812 eax = reg_read(ctxt, VCPU_REGS_RAX); in em_xsetbv()
3813 edx = reg_read(ctxt, VCPU_REGS_RDX); in em_xsetbv()
3814 ecx = reg_read(ctxt, VCPU_REGS_RCX); in em_xsetbv()
3892 u64 rax = reg_read(ctxt, VCPU_REGS_RAX); in check_svme_pa()
3914 u64 rcx = reg_read(ctxt, VCPU_REGS_RCX); in check_rdpmc()
4628 op->val = reg_read(ctxt, VCPU_REGS_RCX) & 0xff; in decode_operand()
4678 reg_read(ctxt, VCPU_REGS_RBX) + in decode_operand()
4679 (reg_read(ctxt, VCPU_REGS_RAX) & 0xff)); in decode_operand()
5195 if (address_mask(ctxt, reg_read(ctxt, VCPU_REGS_RCX)) == 0) { in x86_emulate_insn()
5368 if ((r->end != 0 || reg_read(ctxt, VCPU_REGS_RCX) & 0x3ff) && in x86_emulate_insn()