Lines Matching refs:a0
126 rsr a0, depc
128 s32i a0, a2, PT_AREG2
207 ffs_ws a0, a3 # number of frames to the '1' from left
214 slli a3, a0, 4 # number of frames to save in bits 8..4
222 s32i a0, a5, PT_AREG_END - 16
226 addi a0, a4, -1
228 _bnez a0, 1b
280 rsr a0, depc # get a2
282 s32i a0, a2, PT_AREG2
613 1: rotw -1 # a0..a3 become a4..a7
625 rsr a0, windowbase
627 sub a3, a0, a3
693 addi a0, a3, -1
694 and a3, a3, a0
699 addi a0, a1, -16
700 l32i a3, a0, 0
701 l32i a4, a0, 4
704 l32i a3, a0, 8
705 l32i a4, a0, 12
765 l32i a0, a1, PT_DEPC
768 _bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f
772 l32i a0, a1, PT_AREG0
776 1: wsr a0, depc
777 l32i a0, a1, PT_AREG0
795 rsr a0, SREG_EPS + XCHAL_DEBUGLEVEL
796 bbsi.l a0, PS_EXCM_BIT, .Ldebug_exception_in_exception # exception mode
810 or a2, a0, a2
819 l32i a0, a3, DT_DEBUG_SAVE
821 s32i a0, a2, PT_AREG0
822 movi a0, 0
823 s32i a0, a2, PT_DEPC # mark it as a regular exception
825 xsr a0, depc
827 s32i a0, a2, PT_AREG2
860 bbci.l a0, PS_UM_BIT, .Ldebug_exception_in_exception # jump if kernel mode
862 rsr a0, debugcause
863 bbsi.l a0, DEBUGCAUSE_DBREAK_BIT, .Ldebug_save_dbreak
867 l32i a0, a3, DT_DBREAKC_SAVE + _index * 4
868 wsr a0, SREG_DBREAKC + _index
872 l32i a0, a3, DT_ICOUNT_LEVEL_SAVE
873 wsr a0, icountlevel
875 l32i a0, a3, DT_ICOUNT_SAVE
876 xsr a0, icount
878 l32i a0, a3, DT_DEBUG_SAVE
885 movi a0, 0
886 xsr a0, SREG_DBREAKC + _index
887 s32i a0, a3, DT_DBREAKC_SAVE + _index * 4
891 movi a0, XCHAL_EXCM_LEVEL + 1
892 xsr a0, icountlevel
893 s32i a0, a3, DT_ICOUNT_LEVEL_SAVE
895 movi a0, 0xfffffffe
896 xsr a0, icount
897 s32i a0, a3, DT_ICOUNT_SAVE
899 l32i a0, a3, DT_DEBUG_SAVE
939 movi a0, 1
942 wsr a0, windowstart
952 movi a0, 0
1009 rsr a0, windowbase
1053 rsr a0, ps
1054 bbsi.l a0, PS_WOE_BIT, 1f
1057 or a0, a0, a3
1058 wsr a0, ps
1061 rsr a0, epc1
1062 s32i a0, a3, TI_PS_WOE_FIX_ADDR
1065 l32i a0, a2, PT_AREG0
1097 rsr a0, epc1
1098 addi a0, a0, 3
1099 wsr a0, epc1
1101 l32i a0, a2, PT_DEPC
1102 bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, fast_syscall_unrecoverable
1104 rsr a0, depc # get syscall-nr
1105 _beqz a0, fast_syscall_spill_registers
1106 _beqi a0, __NR_xtensa, fast_syscall_xtensa
1116 l32i a0, a2, PT_AREG0 # restore a0
1119 wsr a0, excsave1
1157 access_ok a3, a7, a0, a2, .Leac # a0: scratch reg, a2: sp
1166 EX(.Leac) l32i a0, a3, 0 # read old value
1167 bne a0, a4, 1f # same as old value? jump
1170 l32i a0, a2, PT_AREG0 # restore a0
1175 l32i a0, a2, PT_AREG0 # restore a0
1183 add a0, a4, a7 # + arg
1184 moveqz a0, a4, a6 # set
1186 EX(.Leac) s32i a0, a3, 0 # write new value
1188 mov a0, a2
1190 l32i a7, a0, PT_AREG7 # restore a7
1191 l32i a0, a0, PT_AREG0 # restore a0
1195 l32i a0, a2, PT_AREG0 # restore a0
1200 l32i a0, a2, PT_AREG0 # restore a0
1210 l32i a0, a2, PT_AREG0 # restore a0
1241 movi a0, fast_syscall_spill_registers_fixup
1242 s32i a0, a3, EXC_TABLE_FIXUP
1243 rsr a0, windowbase
1244 s32i a0, a3, EXC_TABLE_PARAM
1249 rsr a0, sar
1251 s32i a0, a2, PT_SAR
1268 rsr a0, windowbase
1270 ssr a0 # holds WB
1271 slli a0, a3, WSBITS
1272 or a3, a3, a0 # a3 = xxxwww1yyxxxwww1yy
1278 movi a0, (1 << (WSBITS-1))
1283 or a3, a3, a0 # 1yyxxxwww
1288 neg a0, a3
1289 and a3, a0, a3 # first bit set from right: 000010000
1291 ffs_ws a0, a3 # a0: shifts to skip empty frames
1293 sub a0, a3, a0 # WSBITS-a0:number of 0-bits from right
1294 ssr a0 # save in SAR for later.
1297 add a3, a3, a0
1440 wsr a0, excsave1
1468 xsr a0, depc # restore depc and a0
1520 s32i a0, a2, PT_AREG0
1530 rsr a0, exccause
1531 addx4 a0, a0, a3 # find entry in table
1532 l32i a0, a0, EXC_TABLE_FAST_USER # load handler
1534 jx a0
1572 l32i a0, a2, PT_AREG0 # restore a0
1637 l32i a0, a1, TASK_MM # tsk->mm
1638 beqz a0, .Lfast_second_level_miss_no_mm
1642 _PGD_OFFSET(a0, a3, a1)
1643 l32i a0, a0, 0 # read pmdval
1644 beqz a0, .Lfast_second_level_miss_no_pmd
1661 add a0, a0, a1 # pmdval - PAGE_OFFSET
1662 extui a1, a0, 0, PAGE_SHIFT # ... & PAGE_MASK
1663 xor a0, a0, a1
1666 or a0, a0, a1 # ... | PAGE_DIRECTORY
1688 wdtlb a0, a1
1694 movi a0, 0
1695 s32i a0, a3, EXC_TABLE_FIXUP
1699 l32i a0, a2, PT_AREG0
1718 l32i a0, a1, TASK_ACTIVE_MM # unlikely case mm == 0
1719 bnez a0, .Lfast_second_level_miss_continue
1725 movi a0, init_mm
1740 l32i a0, a2, PT_DEPC
1741 bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, .Lfast_second_level_miss_slow
1745 movi a0, __tlbtemp_mapping_start
1747 bltu a3, a0, .Lfast_second_level_miss_slow
1748 movi a0, __tlbtemp_mapping_end
1749 bgeu a3, a0, .Lfast_second_level_miss_slow
1754 rsr a0, excvaddr
1755 bltu a0, a3, .Lfast_second_level_miss_slow
1757 addi a1, a0, -TLBTEMP_SIZE
1769 and a1, a1, a0
1777 extui a3, a0, PAGE_SHIFT + DCACHE_ALIAS_ORDER, 1
1782 mov a0, a6
1783 movnez a0, a7, a3
1835 l32i a0, a1, TASK_MM # tsk->mm
1836 beqz a0, .Lfast_store_no_mm
1840 _PGD_OFFSET(a0, a1, a3)
1841 l32i a0, a0, 0
1842 beqz a0, .Lfast_store_slow
1849 _PTE_OFFSET(a0, a1, a3)
1850 l32i a3, a0, 0 # read pteval
1858 s32i a3, a0, 0
1862 dhwb a0, 0
1864 pdtlb a0, a1
1865 wdtlb a3, a0
1869 movi a0, 0
1871 s32i a0, a3, EXC_TABLE_FIXUP
1877 l32i a0, a2, PT_AREG0
1891 l32i a0, a1, TASK_ACTIVE_MM # unlikely case mm == 0
1897 pdtlb a0, a1
1898 bbci.l a0, DTLB_HIT_BIT, 1f
1899 idtlb a0
1930 s32i a0, sp, 0
1984 l32i a0, sp, 0
2015 addi a12, a0, 3
2019 mov a12, a0
2067 s32i a0, a10, THREAD_RA - TASK_THREAD # save return address
2070 s32i a0, a2, THREAD_RA # save return address
2125 l32i a0, a11, THREAD_RA # restore return address
2198 s32i a0, a2, 0
2250 l32i a0, a2, 0